| /src/sys/dev/fdt/ |
| fdt_iommu.c | 54 * Return the iommu registered with the specified node, or NULL if
60 struct fdtbus_iommu *iommu; local in function:fdtbus_get_iommu
62 LIST_FOREACH(iommu, &fdtbus_iommus, iommu_next) {
63 if (iommu->iommu_phandle == phandle) {
64 return iommu;
74 * Register an IOMMU on the specified node.
80 struct fdtbus_iommu *iommu; local in function:fdtbus_register_iommu
87 if (of_getprop_uint32(phandle, "#iommu-cells", &cells) != 0) {
95 iommu = kmem_alloc(sizeof(*iommu), KM_SLEEP)
117 struct fdtbus_iommu *iommu; local in function:fdtbus_iommu_map
158 struct fdtbus_iommu *iommu; local in function:fdtbus_iommu_map_pci
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/device/ |
| nouveau_nvkm_engine_device_tegra.c | 32 #include <asm/dma-iommu.h>
129 mutex_init(&tdev->iommu.mutex);
132 tdev->iommu.domain = iommu_domain_alloc(&platform_bus_type);
133 if (!tdev->iommu.domain)
137 * A IOMMU is only usable if it supports page sizes smaller
141 pgsize_bitmap = tdev->iommu.domain->ops->pgsize_bitmap;
143 tdev->iommu.pgshift = PAGE_SHIFT;
145 tdev->iommu.pgshift = fls(pgsize_bitmap & ~PAGE_MASK);
146 if (tdev->iommu.pgshift == 0) {
147 dev_warn(dev, "unsupported IOMMU page size\n")
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/core/ |
| tegra.h | 31 } iommu; member in struct:nvkm_device_tegra
39 * If an IOMMU is used, indicates which address bit will trigger a
40 * IOMMU translation when set (when this bit is not set, IOMMU is
41 * bypassed). A value of 0 means an IOMMU is never used.
|
| /src/sys/arch/sun3/sun3x/ |
| iommu.c | 1 /* $NetBSD: iommu.c,v 1.19 2023/12/20 05:18:00 thorpej Exp $ */
37 __KERNEL_RCSID(0, "$NetBSD: iommu.c,v 1.19 2023/12/20 05:18:00 thorpej Exp $");
48 #include <sun3/sun3x/iommu.h>
56 CFATTACH_DECL_NEW(iommu, 0,
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/renesas/ |
| r8a77950.dtsi | 87 ipmmu_mp1: iommu@ec680000 {
92 #iommu-cells = <1>;
95 ipmmu_sy: iommu@e7730000 {
100 #iommu-cells = <1>;
103 /delete-node/ iommu@fd950000;
104 /delete-node/ iommu@fd960000;
105 /delete-node/ iommu@fd970000;
106 /delete-node/ iommu@febe0000;
107 /delete-node/ iommu@fe980000;
|
| r8a77995.dtsi | 662 ipmmu_ds0: iommu@e6740000 {
667 #iommu-cells = <1>;
670 ipmmu_ds1: iommu@e7740000 {
675 #iommu-cells = <1>;
678 ipmmu_hc: iommu@e6570000 {
683 #iommu-cells = <1>;
686 ipmmu_mm: iommu@e67b0000 {
692 #iommu-cells = <1>;
695 ipmmu_mp: iommu@ec670000 {
700 #iommu-cells = <1>
[all...] |
| r8a774e1.dtsi | 1075 ipmmu_ds0: iommu@e6740000 {
1080 #iommu-cells = <1>;
1083 ipmmu_ds1: iommu@e7740000 {
1088 #iommu-cells = <1>;
1091 ipmmu_hc: iommu@e6570000 {
1096 #iommu-cells = <1>;
1099 ipmmu_mm: iommu@e67b0000 {
1105 #iommu-cells = <1>;
1108 ipmmu_mp0: iommu@ec670000 {
1113 #iommu-cells = <1>
[all...] |
| r8a77980.dtsi | 1272 ipmmu_ds1: iommu@e7740000 {
1277 #iommu-cells = <1>;
1280 ipmmu_ir: iommu@ff8b0000 {
1285 #iommu-cells = <1>;
1288 ipmmu_mm: iommu@e67b0000 {
1294 #iommu-cells = <1>;
1297 ipmmu_rt: iommu@ffc80000 {
1302 #iommu-cells = <1>;
1305 ipmmu_vc0: iommu@fe990000 {
1310 #iommu-cells = <1>
[all...] |
| r8a77990.dtsi | 887 ipmmu_ds0: iommu@e6740000 {
892 #iommu-cells = <1>;
895 ipmmu_ds1: iommu@e7740000 {
900 #iommu-cells = <1>;
903 ipmmu_hc: iommu@e6570000 {
908 #iommu-cells = <1>;
911 ipmmu_mm: iommu@e67b0000 {
917 #iommu-cells = <1>;
920 ipmmu_mp: iommu@ec670000 {
925 #iommu-cells = <1>
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
| mt8173.dtsi | 585 iommu: iommu@10205000 { label
593 #iommu-cells = <1>;
1011 iommus = <&iommu M4U_PORT_MDP_RDMA0>;
1022 iommus = <&iommu M4U_PORT_MDP_RDMA1>;
1052 iommus = <&iommu M4U_PORT_MDP_WDMA>;
1061 iommus = <&iommu M4U_PORT_MDP_WROT0>;
1070 iommus = <&iommu M4U_PORT_MDP_WROT1>;
1080 iommus = <&iommu M4U_PORT_DISP_OVL0>;
1091 iommus = <&iommu M4U_PORT_DISP_OVL1>
[all...] |
| mt8167.dtsi | 174 iommu: m4u@10203000 { label
179 #iommu-cells = <1>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/ |
| juno-base.dtsi | 35 smmu_gpu: iommu@2b400000 {
40 #iommu-cells = <1>;
47 smmu_pcie: iommu@2b500000 {
52 #iommu-cells = <1>;
58 smmu_etr: iommu@2b600000 {
63 #iommu-cells = <1>;
557 iommu-map-mask = <0x0>; /* RC has no means to output PCI RID */
558 iommu-map = <0x0 &smmu_pcie 0x0 0x1>;
637 smmu_dma: iommu@7fb00000 {
642 #iommu-cells = <1>
[all...] |
| fvp-base-revc.dts | 170 iommu-map = <0x0 &smmu 0x0 0x10000>;
175 smmu: iommu@2b400000 {
184 #iommu-cells = <1>;
|
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| mt7623n.dtsi | 103 iommu: mmsys_iommu@10205000 { label
111 #iommu-cells = <1>;
125 iommus = <&iommu MT2701_M4U_PORT_JPGDEC_WDMA>,
126 <&iommu MT2701_M4U_PORT_JPGDEC_BSDMA>;
146 iommus = <&iommu MT2701_M4U_PORT_DISP_OVL_0>;
156 iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA>;
166 iommus = <&iommu MT2701_M4U_PORT_DISP_WDMA>;
217 iommus = <&iommu MT2701_M4U_PORT_DISP_RDMA1>;
|
| dra74x.dtsi | 74 compatible = "ti,dra7-dsp-iommu";
77 #iommu-cells = <0>;
104 compatible = "ti,dra7-dsp-iommu";
107 #iommu-cells = <0>;
|
| exynos5250.dtsi | 319 iommu-names = "left", "right";
869 #iommu-cells = <0>;
880 #iommu-cells = <0>;
891 #iommu-cells = <0>;
901 #iommu-cells = <0>;
912 #iommu-cells = <0>;
922 #iommu-cells = <0>;
932 #iommu-cells = <0>;
942 #iommu-cells = <0>;
952 #iommu-cells = <0>
[all...] |
| exynos5420.dtsi | 201 iommu-names = "left", "right";
897 #iommu-cells = <0>;
907 #iommu-cells = <0>;
918 #iommu-cells = <0>;
929 #iommu-cells = <0>;
940 #iommu-cells = <0>;
951 #iommu-cells = <0>;
961 #iommu-cells = <0>;
971 #iommu-cells = <0>;
982 #iommu-cells = <0>
[all...] |
| exynos4412.dtsi | 326 #iommu-cells = <0>;
337 #iommu-cells = <0>;
348 #iommu-cells = <0>;
359 #iommu-cells = <0>;
370 #iommu-cells = <0>;
382 #iommu-cells = <0>;
394 #iommu-cells = <0>;
664 iommu-names = "isp", "drc", "fd", "mcuctl";
|
| exynos4.dtsi | 446 iommu-names = "left", "right";
895 #iommu-cells = <0>;
906 #iommu-cells = <0>;
917 #iommu-cells = <0>;
928 #iommu-cells = <0>;
939 #iommu-cells = <0>;
950 #iommu-cells = <0>;
961 #iommu-cells = <0>;
972 #iommu-cells = <0>;
983 #iommu-cells = <0>
[all...] |
| r8a7793.dtsi | 340 ipmmu_sy0: iommu@e6280000 {
346 #iommu-cells = <1>;
350 ipmmu_sy1: iommu@e6290000 {
355 #iommu-cells = <1>;
359 ipmmu_ds: iommu@e6740000 {
365 #iommu-cells = <1>;
369 ipmmu_mp: iommu@ec680000 {
374 #iommu-cells = <1>;
378 ipmmu_mx: iommu@fe951000 {
384 #iommu-cells = <1>
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvif/ |
| os.h | 32 #include <linux/iommu.h>
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/ |
| msm8916.dtsi | 1231 apps_iommu: iommu@1ef0000 {
1234 #iommu-cells = <1>;
1235 compatible = "qcom,msm8916-iommu", "qcom,msm-iommu-v1";
1241 qcom,iommu-secure-id = <17>;
1244 iommu-ctx@3000 {
1245 compatible = "qcom,msm-iommu-v1-sec";
1251 iommu-ctx@4000 {
1252 compatible = "qcom,msm-iommu-v1-ns";
1258 iommu-ctx@5000
[all...] |
| /src/sys/arch/sparc64/sparc64/ |
| sysioreg.h | 41 * sysio is the sun5/sun4u SBUS controller/DMA/IOMMU/etc. ASIC.
73 uint64_t iommu_cr; /* IOMMU control register */ /* 1fe.0000.2400 */
74 uint64_t iommu_tsb; /* IOMMU TSB base register */ /* 1fe.0000.2408 */
75 uint64_t iommu_flush; /* IOMMU flush register */ /* 1fe.0000.2410 */
76 } iommu; member in struct:sysioreg
107 uint64_t iommu_queue_diag[16]; /* IOMMU LRU queue diag */ /* 1fe.0000.4500-457f */
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/instmem/ |
| nouveau_nvkm_subdev_instmem_gk20a.c | 32 * 1) If an IOMMU unit has been probed, the IOMMU API is used to make memory
34 * 2) If no IOMMU unit is probed, the DMA API is used to allocate physically
87 * Used for objects flattened using the IOMMU API
126 /* Only used if IOMMU if present */
383 /* clear IOMMU bit to unmap pages */
565 nvkm_error(subdev, "IOMMU space is full!\n");
576 nvkm_error(subdev, "IOMMU mapping failure: %d\n", ret);
586 /* IOMMU bit tells that an address is to be resolved through the IOMMU */
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/rockchip/ |
| rk3368.dtsi | 708 iep_mmu: iommu@ff900800 {
709 compatible = "rockchip,iommu";
715 #iommu-cells = <0>;
719 isp_mmu: iommu@ff914000 {
720 compatible = "rockchip,iommu";
727 #iommu-cells = <0>;
732 vop_mmu: iommu@ff930300 {
733 compatible = "rockchip,iommu";
739 #iommu-cells = <0>;
743 hevc_mmu: iommu@ff9a0440
[all...] |
