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    Searched refs:irq_enable_mask (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/via/
via_irq.c 298 dev_priv->irq_enable_mask = VIA_IRQ_VBLANK_ENABLE;
326 dev_priv->irq_enable_mask |= cur_irq->enable_mask;
338 ~(dev_priv->irq_enable_mask));
356 | dev_priv->irq_enable_mask);
380 ~(VIA_IRQ_VBLANK_ENABLE | dev_priv->irq_enable_mask));
via_drv.h 113 uint32_t irq_enable_mask; member in struct:drm_via_private
  /src/sys/external/bsd/drm2/dist/drm/i915/gt/
intel_ring_submission.c 1001 gen5_gt_enable_irq(engine->gt, engine->irq_enable_mask);
1007 gen5_gt_disable_irq(engine->gt, engine->irq_enable_mask);
1013 engine->i915->irq_mask &= ~engine->irq_enable_mask;
1021 engine->i915->irq_mask |= engine->irq_enable_mask;
1030 i915->irq_mask &= ~engine->irq_enable_mask;
1040 i915->irq_mask |= engine->irq_enable_mask;
1063 ~(engine->irq_enable_mask | engine->irq_keep_mask));
1068 gen5_gt_enable_irq(engine->gt, engine->irq_enable_mask);
1075 gen5_gt_disable_irq(engine->gt, engine->irq_enable_mask);
1081 ENGINE_WRITE(engine, RING_IMR, ~engine->irq_enable_mask);
    [all...]
intel_engine_types.h 411 u32 irq_enable_mask; /* bitmask to enable ring interrupt */ member in struct:intel_engine_cs
intel_lrc.c 3848 ~(engine->irq_enable_mask | engine->irq_keep_mask));
4366 engine->irq_enable_mask = GT_RENDER_USER_INTERRUPT << shift;

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