| /src/sys/dev/acpi/ |
| amdgpio.c | 288 int irqmode; local in function:amdgpio_register_event
301 irqmode = gpio->Polarity == ACPI_ACTIVE_HIGH ?
306 irqmode = GPIO_INTR_NEG_EDGE;
308 irqmode = GPIO_INTR_POS_EDGE;
311 irqmode = GPIO_INTR_DOUBLE_EDGE;
315 ih = amdgpio_intr_establish(sc, pin, IPL_VM, irqmode,
374 amdgpio_intr_establish(void *priv, int pin, int ipl, int irqmode,
410 if ((irqmode & GPIO_INTR_LEVEL_MASK) != 0) {
413 KASSERT((irqmode & GPIO_INTR_EDGE_MASK) != 0);
414 if ((irqmode & GPIO_INTR_NEG_EDGE) != 0)
[all...] |
| qcomgpio.c | 419 int irqmode; local in function:qcomgpio_register_event
432 irqmode = gpio->Polarity == ACPI_ACTIVE_HIGH ?
437 irqmode = GPIO_INTR_NEG_EDGE;
439 irqmode = GPIO_INTR_POS_EDGE;
442 irqmode = GPIO_INTR_DOUBLE_EDGE;
446 ih = qcomgpio_intr_establish(sc, pin, IPL_VM, irqmode,
521 qcomgpio_intr_establish(void *priv, int pin, int ipl, int irqmode,
542 qih->ih_type = (irqmode & GPIO_INTR_LEVEL_MASK) != 0 ?
560 if ((irqmode & GPIO_INTR_LEVEL_MASK) != 0) {
562 pol = (irqmode & GPIO_INTR_HIGH_LEVEL) != 0
[all...] |
| acpi_gpio.c | 253 int *irqmode)
276 *irqmode = gpio->Polarity == ACPI_ACTIVE_HIGH ?
281 *irqmode = GPIO_INTR_NEG_EDGE;
283 *irqmode = GPIO_INTR_POS_EDGE;
286 *irqmode = GPIO_INTR_DOUBLE_EDGE;
|
| /src/sys/dev/gpio/ |
| gpio.c | 487 gpio_irqmode_sanitize(int irqmode)
491 has_edge = irqmode & GPIO_INTR_EDGE_MASK;
492 has_level = irqmode & GPIO_INTR_LEVEL_MASK;
495 if ((irqmode & GPIO_INTR_MODE_MASK) == 0)
504 if (irqmode & GPIO_INTR_DOUBLE_EDGE) {
506 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK) |
508 } else if ((irqmode ^
511 irqmode = (irqmode & ~GPIO_INTR_EDGE_MASK)
[all...] |
| gpiosim.c | 384 gpiosim_intr_establish(void *vsc, int pin, int ipl, int irqmode,
393 irq->sc_gpio_irqmode = irqmode;
397 if (((irqmode & GPIO_INTR_HIGH_LEVEL) ||
398 (irqmode & GPIO_INTR_LOW_LEVEL)) &&
405 if (((irqmode & GPIO_INTR_HIGH_LEVEL) && (sc->sc_state & (1LL << pin))) ||
406 ((irqmode & GPIO_INTR_LOW_LEVEL) && ((sc->sc_state & (1LL << pin)) == 0))) {
447 gpiosim_gpio_intrstr(void *vsc, int pin, int irqmode, char *buf, size_t buflen)
|
| gpioirq.c | 154 int irqmode, flags; local in function:gpioirq_attach
186 irqmode = ga->ga_flags & GPIOIRQ_FLAGS_IRQMODE;
200 if (!gpio_intr_str(sc->sc_gpio, &sc->sc_map, apin, irqmode,
207 irqmode)) {
209 "irqmode not supported: %s\n", sc->sc_intrs[apin].sc_intrstr);
232 irqmode | GPIO_INTR_MPSAFE,
|
| /src/sys/arch/arm/ti/ |
| ti_gpio.c | 435 ti_gpio_gp_intr_establish(void *vsc, int pin, int ipl, int irqmode,
451 if ((irqmode & (GPIO_INTR_LOW_LEVEL|GPIO_INTR_HIGH_LEVEL)) ==
465 sc->sc_intr[pin].intr_mpsafe = (irqmode & GPIO_INTR_MPSAFE) != 0;
471 if ((irqmode & GPIO_INTR_LOW_LEVEL) != 0)
478 if ((irqmode & GPIO_INTR_HIGH_LEVEL) != 0)
485 if ((irqmode & GPIO_INTR_POS_EDGE) != 0 ||
486 (irqmode & GPIO_INTR_DOUBLE_EDGE) != 0)
493 if ((irqmode & GPIO_INTR_NEG_EDGE) != 0 ||
494 (irqmode & GPIO_INTR_DOUBLE_EDGE) != 0)
523 ti_gpio_gp_intrstr(void *vsc, int pin, int irqmode, char *buf, size_t buflen
[all...] |
| /src/sys/arch/arm/rockchip/ |
| rk_gpio.c | 498 rk_gpio_intr_establish(void *vsc, int pin, int ipl, int irqmode,
502 bool mpsafe = (irqmode & GPIO_INTR_MPSAFE) != 0;
503 int type = irqmode & GPIO_INTR_MODE_MASK;
542 rk_gpio_intrstr(void *vsc, int pin, int irqmode, char *buf, size_t buflen)
|
| /src/sys/dev/i2c/ |
| ihidev.c | 729 int pin, irqmode, error; local in function:ihidev_intr_init
731 rv = acpi_gpio_get_int(hdl, 0, &sc->sc_ih_gpio, &pin, &irqmode);
747 &sc->sc_ih_gpiomap, 0, IPL_VM, irqmode, ihidev_intr, sc);
754 sc->sc_intr_type = (irqmode & GPIO_INTR_LEVEL_MASK) ?
758 irqmode, buf, sizeof(buf));
|
| /src/sys/dev/usb/ |
| umcpmio_subr.c | 369 umcpmio_set_gpio_irq_sram(struct mcp2221_set_sram_req *req, int irqmode)
373 if (irqmode & (GPIO_INTR_POS_EDGE | GPIO_INTR_DOUBLE_EDGE)) {
379 if (irqmode & (GPIO_INTR_NEG_EDGE | GPIO_INTR_DOUBLE_EDGE)) {
|
| umcpmio.c | 503 umcpmio_gpio_intr_establish(void *vsc, int pin, int ipl, int irqmode,
519 DPRINTF(("umcpmio_intr_establish: pin=%d, irqmode=%04x\n",
520 pin, irqmode));
532 umcpmio_set_gpio_irq_sram(&set_sram_req, irqmode);
612 umcpmio_gpio_intrstr(void *vsc, int pin, int irqmode, char *buf, size_t buflen)
|
| /src/sys/arch/arm/broadcom/ |
| bcm2835_gpio.c | 626 bcmgpio_gpio_intr_establish(void *vsc, int pin, int ipl, int irqmode,
630 int eint_flags = (irqmode & GPIO_INTR_MPSAFE) ? BCMGPIO_INTR_MPSAFE : 0;
632 int type = irqmode & GPIO_INTR_MODE_MASK;
677 bcmgpio_gpio_intrstr(void *vsc, int pin, int irqmode, char *buf, size_t buflen)
|
| /src/sys/dev/ic/ |
| igpio.c | 601 igpio_intr_establish(void *priv, int pin, int ipl, int irqmode,
638 switch (irqmode & GPIO_INTR_EDGE_MASK) {
650 switch (irqmode & GPIO_INTR_LEVEL_MASK) {
723 igpio_intr_str(void *priv, int pin, int irqmode,
|
| /src/sys/arch/arm/sunxi/ |
| sunxi_gpio.c | 637 sunxi_gpio_intr_establish(void *vsc, int pin, int ipl, int irqmode,
641 bool mpsafe = (irqmode & GPIO_INTR_MPSAFE) != 0;
642 int type = irqmode & GPIO_INTR_MODE_MASK;
685 sunxi_gpio_intrstr(void *vsc, int pin, int irqmode, char *buf, size_t buflen)
|
| /src/sys/dev/pci/ |
| if_aq.c | 4465 int irqmode; local in function:aq_hw_init
4467 irqmode = AQ_INTR_CTRL_IRQMODE_MSIX;
4469 irqmode = AQ_INTR_CTRL_IRQMODE_MSI;
4474 AQ_WRITE_REG_BIT(sc, AQ_INTR_CTRL_REG, AQ_INTR_CTRL_IRQMODE, irqmode);
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