HomeSort by: relevance | last modified time | path
    Searched refs:isImm (Results 1 - 25 of 205) sorted by relevancy

1 2 3 4 5 6 7 8 9

  /src/external/apache2/llvm/dist/llvm/lib/Target/VE/MCTargetDesc/
VEInstPrinter.cpp 64 if (MO.isImm()) {
89 if (MI->getOperand(OpNum + 2).isImm() &&
95 if (MI->getOperand(OpNum + 1).isImm() &&
97 MI->getOperand(OpNum).isImm() && MI->getOperand(OpNum).getImm() == 0) {
98 if (MI->getOperand(OpNum + 2).isImm() &&
106 if (MI->getOperand(OpNum + 1).isImm() &&
112 if (MI->getOperand(OpNum).isImm() && MI->getOperand(OpNum).getImm() == 0) {
133 if (MI->getOperand(OpNum + 1).isImm() &&
139 if (MI->getOperand(OpNum).isImm() && MI->getOperand(OpNum).getImm() == 0) {
140 if (MI->getOperand(OpNum + 1).isImm() &
    [all...]
VEMCCodeEmitter.cpp 106 if (MO.isImm())
130 if (MO.isReg() || MO.isImm())
142 if (MO.isImm())
152 if (MO.isImm())
  /src/external/apache2/llvm/dist/llvm/lib/Target/BPF/MCTargetDesc/
BPFInstPrinter.cpp 57 } else if (Op.isImm()) {
75 if (OffsetOp.isImm()) {
89 if (Op.isImm())
100 if (Op.isImm()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/
AArch64MCCodeEmitter.cpp 207 assert(MO.isImm() && "did not expect relocated expression");
218 if (MO.isImm())
239 if (MO.isImm())
270 if (MO.isImm())
301 if (MO.isImm())
323 if (MO.isImm())
351 if (MO.isImm())
371 if (MO.isImm())
393 if (MO.isImm())
419 assert(MO.isImm() && "Expected an immediate value for the shift amount!")
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/MCTargetDesc/
LanaiMCCodeEmitter.cpp 114 if (MCOp.isImm())
145 ((Op2.isImm() && Op2.getImm() != 0) ||
153 if (LPAC::modifiesOp(AluCode) && ((Op2.isImm() && Op2.getImm() != 0) ||
194 assert((Op2.isImm() || Op2.isExpr()) &&
200 if (Op2.isImm()) {
230 assert(AluMCOp.isImm() && "Third operator is not immediate.");
265 assert((Op2.isImm() || Op2.isExpr()) &&
271 if (Op2.isImm()) {
292 if (MCOp.isReg() || MCOp.isImm())
LanaiInstPrinter.cpp 155 else if (Op.isImm())
166 if (Op.isImm()) {
180 if (Op.isImm()) {
192 if (Op.isImm()) {
204 if (Op.isImm()) {
229 assert((OffsetOp.isImm() || OffsetOp.isExpr()) && "Immediate expected");
230 if (OffsetOp.isImm()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/MSP430/MCTargetDesc/
MSP430InstPrinter.cpp 40 if (Op.isImm()) {
58 } else if (Op.isImm()) {
87 assert(Disp.isImm() && "Expected immediate in displacement field");
MSP430MCCodeEmitter.cpp 108 if (MO.isImm()) {
128 if (MO2.isImm()) {
156 if (MO.isImm())
169 assert(MO.isImm() && "Expr operand expected");
188 assert(MO.isImm() && "Immediate operand expected");
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARC/MCTargetDesc/
ARCInstPrinter.cpp 148 if (Op.isImm()) {
162 assert(offset.isImm() && "Offset should be immediate.");
171 assert(Op.isImm() && "Predicate operand is immediate.");
178 assert(Op.isImm() && "Predicate operand is immediate.");
  /src/external/apache2/llvm/dist/llvm/lib/MC/
MCInst.cpp 31 } else if (isImm())
49 if (isImm()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/MCTargetDesc/
CSKYMCCodeEmitter.cpp 30 assert(MO.isImm() && "Unexpected MO type.");
58 if (MO.isImm())
CSKYMCCodeEmitter.h 52 assert(MO.isImm() && "Unexpected MO type.");
64 assert(MO.isImm() && "Unexpected MO type.");
76 if (MO.isImm())
CSKYInstPrinter.cpp 89 if (MO.isImm()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AVR/MCTargetDesc/
AVRMCCodeEmitter.cpp 104 assert(MO.isImm());
157 if (OffsetOp.isImm()) {
174 assert(MI.getOperand(OpNo).isImm());
201 assert(MO.isImm());
216 assert(MO.isImm());
255 if (MO.isImm()) return static_cast<unsigned>(MO.getImm());
AVRInstPrinter.cpp 133 } else if (Op.isImm()) {
157 if (Op.isImm()) {
183 if (OffsetOp.isImm()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/
PPCMCCodeEmitter.cpp 48 if (MO.isReg() || MO.isImm())
63 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
76 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
89 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
111 if (MO.isReg() || MO.isImm()) return getMachineOpValue(MI, MO, Fixups, STI);
125 if (MO.isImm())
158 if (MO.isImm())
176 if (MO.isImm())
194 if (MO.isImm()) {
216 assert(MO.isImm() && "Expecting an immediate operand.")
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/MCTargetDesc/
MipsMCCodeEmitter.cpp 62 assert(Inst.getOperand(2).isImm());
242 if (MO.isImm()) return MO.getImm() >> 2;
264 if (MO.isImm()) return MO.getImm() >> 1;
286 if (MO.isImm())
309 if (MO.isImm())
332 if (MO.isImm()) return MO.getImm() >> 1;
353 if (MO.isImm()) return MO.getImm() >> 1;
374 if (MO.isImm()) return MO.getImm() >> 1;
396 if (MO.isImm()) return MO.getImm() >> 2;
418 if (MO.isImm()) return MO.getImm() >> 2
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/
ARMMCTargetDesc.cpp 42 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 15) &&
43 (MI.getOperand(1).isImm() && MI.getOperand(1).getImm() == 0) &&
46 (MI.getOperand(3).isImm() && MI.getOperand(3).getImm() == 7)) {
47 if ((MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 4)) {
48 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 5) {
55 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10) {
62 if (MI.getOperand(4).isImm() && MI.getOperand(4).getImm() == 10 &&
63 (MI.getOperand(5).isImm() && MI.getOperand(5).getImm() == 5)) {
69 ((MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 10) ||
70 (MI.getOperand(0).isImm() && MI.getOperand(0).getImm() == 11)))
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/
LanaiMemAluCombiner.cpp 186 (Op.isImm() && Op.getImm() == 0));
247 assert((AluOffset.isReg() || AluOffset.isImm()) &&
252 unsigned NewOpc = mergedOpcode(MemInstr->getOpcode(), AluOffset.isImm());
266 else if (AluOffset.isImm())
301 if (Op2.isImm()) {
310 if (Offset.isImm() &&
375 assert(AluOperand.isImm() && "Unexpected memory operator type");
  /src/external/apache2/llvm/dist/llvm/lib/Target/Sparc/MCTargetDesc/
SparcMCCodeEmitter.cpp 133 if (MO.isImm())
158 if (MO.isImm())
215 if (MO.isReg() || MO.isImm())
228 if (MO.isReg() || MO.isImm())
241 if (MO.isReg() || MO.isImm())
  /src/external/apache2/llvm/dist/llvm/include/llvm/MC/MCParser/
MCParsedAsmOperand.h 56 /// isImm - Is this an immediate operand?
57 virtual bool isImm() const = 0;
  /src/external/apache2/llvm/dist/llvm/lib/Target/AMDGPU/
AMDGPUGlobalISelUtils.cpp 25 if (Op.isImm())
GCNDPPCombine.cpp 172 if (Op1.isImm())
296 assert(OldOpnd->isImm());
351 if (!CombBCZ && OldOpndValue && OldOpndValue->isImm()) {
380 assert(Imm->isImm());
404 assert(DppCtrl && DppCtrl->isImm());
414 assert(RowMaskOpnd && RowMaskOpnd->isImm());
416 assert(BankMaskOpnd && BankMaskOpnd->isImm());
421 assert(BCZOpnd && BCZOpnd->isImm());
435 // We could use: assert(!OldOpndValue || OldOpndValue->isImm())
438 assert(!OldOpndValue || OldOpndValue->isImm() || OldOpndValue == OldOpnd)
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/M68k/MCTargetDesc/
M68kInstPrinter.cpp 65 if (MO.isImm()) {
77 if (MO.isImm())
142 if (Op.isImm()) {
201 assert(MO.isImm() && "absolute memory addressing needs an immediate");
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/AsmParser/
LanaiAsmParser.cpp 162 assert(isImm() && "Invalid type access!");
194 bool isImm() const override { return Kind == IMMEDIATE; }
211 if (!isImm())
225 bool isCallTarget() { return isImm() || isToken(); }
228 if (!isImm())
251 if (!isImm())
264 if (!isImm())
288 if (!isImm())
312 if (!isImm())
325 if (!isImm())
    [all...]

Completed in 42 milliseconds

1 2 3 4 5 6 7 8 9