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    Searched refs:isOperationLegalOrCustom (Results 1 - 17 of 17) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
LegalizeVectorOps.cpp 688 TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NVT))
692 TLI.isOperationLegalOrCustom(ISD::STRICT_FP_TO_SINT, NVT))
1121 if (TLI.isOperationLegalOrCustom(ISD::BITREVERSE, VT.getScalarType())) {
1137 (TLI.isOperationLegalOrCustom(ISD::BITREVERSE, ByteVT) ||
1138 (TLI.isOperationLegalOrCustom(ISD::SHL, ByteVT) &&
1139 TLI.isOperationLegalOrCustom(ISD::SRL, ByteVT) &&
1155 if (TLI.isOperationLegalOrCustom(ISD::SHL, VT) &&
1156 TLI.isOperationLegalOrCustom(ISD::SRL, VT) &&
1326 if (TLI.isOperationLegalOrCustom(ISD::FSUB, Node->getValueType(0))) {
1342 if (TLI.isOperationLegalOrCustom(ISD::FNEG, VT) &
    [all...]
TargetLowering.cpp 244 if (isOperationLegalOrCustom(ISD::STORE, NewVT) &&
248 isOperationLegalOrCustom(ISD::STORE, MVT::f64) &&
2124 bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT);
2125 bool i32Legal = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32);
3458 if (!VT.isVector() && TLI.isOperationLegalOrCustom(ISD::CTPOP, CTVT))
5202 if (isOperationLegalOrCustom(ISD::MULHS, VT, IsAfterLegalization))
5204 if (isOperationLegalOrCustom(ISD::SMUL_LOHI, VT, IsAfterLegalization)) {
5360 if (isOperationLegalOrCustom(ISD::MULHU, VT, IsAfterLegalization))
5362 if (isOperationLegalOrCustom(ISD::UMUL_LOHI, VT, IsAfterLegalization)) {
5474 if (!DCI.isBeforeLegalizeOps() && !isOperationLegalOrCustom(ISD::MUL, VT)
    [all...]
LegalizeDAG.cpp 1566 if (TLI.isOperationLegalOrCustom(ISD::FABS, FloatVT) &&
1567 TLI.isOperationLegalOrCustom(ISD::FNEG, FloatVT)) {
1630 if (TLI.isOperationLegalOrCustom(ISD::FCOPYSIGN, FloatVT)) {
2434 if (!TLI.isOperationLegalOrCustom(
2533 if (TLI.isOperationLegalOrCustom(SIntOp, NewInTy)) {
2541 if (TLI.isOperationLegalOrCustom(UIntOp, NewInTy)) {
2593 if (TLI.isOperationLegalOrCustom(OpToUse, NewOutTy))
2598 if (!IsSigned && TLI.isOperationLegalOrCustom(OpToUse, NewOutTy))
2633 if (TLI.isOperationLegalOrCustom(Opcode, NewOutTy))
3159 if ((TLI.isOperationLegalOrCustom(ISD::FSINCOS, VT) |
    [all...]
DAGCombiner.cpp 765 return TLI.isOperationLegalOrCustom(Opcode, VT, LegalOperations);
2603 if (!TLI.isOperationLegalOrCustom(V.getOpcode(), VT))
2705 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT))
2849 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT))
2891 TLI.isOperationLegalOrCustom(ISD::UADDO, N->getValueType(0)))
2930 TLI.isOperationLegalOrCustom(ISD::SADDO, N->getValueType(0)))
3079 if (!TLI.isOperationLegalOrCustom(NewOp, Carry0.getValue(0).getValueType()))
3307 !TLI.isOperationLegalOrCustom(ISD::ABS, VT) &&
3504 if (TLI.isOperationLegalOrCustom(ISD::ABS, VT)) {
3566 if (TLI.isOperationLegalOrCustom(ISD::ADDCARRY, VT))
    [all...]
LegalizeIntegerTypes.cpp 467 if (!OVT.isVector() && !TLI.isOperationLegalOrCustom(ISD::BSWAP, NVT)) {
489 !TLI.isOperationLegalOrCustom(ISD::BITREVERSE, NVT)) {
596 TLI.isOperationLegalOrCustom(ISD::FP_TO_SINT, NVT))
601 TLI.isOperationLegalOrCustom(ISD::STRICT_FP_TO_SINT, NVT))
805 if (IsShift || TLI.isOperationLegalOrCustom(Opcode, PromotedType)) {
1200 !TLI.isOperationLegalOrCustom(Opcode, VT)) {
2563 bool HasOpCarry = TLI.isOperationLegalOrCustom(
2586 TLI.isOperationLegalOrCustom(N->getOpcode() == ISD::ADD ?
2605 TLI.isOperationLegalOrCustom(N->getOpcode() == ISD::ADD ?
2749 bool HasCarryOp = TLI.isOperationLegalOrCustom(
    [all...]
SelectionDAGBuilder.cpp 3280 !TLI.isOperationLegalOrCustom(ISD::VSELECT, VT);
3296 if (TLI.isOperationLegalOrCustom(ISD::FMINNUM, VT))
3298 else if (TLI.isOperationLegalOrCustom(ISD::FMINIMUM, VT))
3301 Opc = TLI.isOperationLegalOrCustom(ISD::FMINNUM, VT.getScalarType()) ?
3314 if (TLI.isOperationLegalOrCustom(ISD::FMAXNUM, VT))
3316 else if (TLI.isOperationLegalOrCustom(ISD::FMAXIMUM, VT))
3319 Opc = TLI.isOperationLegalOrCustom(ISD::FMAXNUM, VT.getScalarType()) ?
3335 (TLI.isOperationLegalOrCustom(Opc, VT) ||
3337 TLI.isOperationLegalOrCustom(Opc, VT.getScalarType()))) &&
LegalizeVectorTypes.cpp 3128 if (!TLI.isOperationLegalOrCustom(N->getOpcode(), WideVecVT) &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCTargetTransformInfo.cpp 635 if (TLI->isOperationLegalOrCustom(Opcode, EVTy))
638 TLI->isOperationLegalOrCustom(Opcode, EVTy.getScalarType()))
PPCISelLowering.cpp 8169 isOperationLegalOrCustom(Op.getOpcode(),
16245 isOperationLegalOrCustom(ISD::FMA, getValueType(DL, Ty)) &&
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
BasicTTIImpl.h 431 return TLI->isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
432 TLI->isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
464 TLI->isOperationLegalOrCustom(ISD::FSQRT, VT);
TargetLowering.h 1108 bool isOperationLegalOrCustom(unsigned Op, EVT VT,
1158 return isOperationLegalOrCustom(ISD::BR_JT, MVT::Other) ||
1159 isOperationLegalOrCustom(ISD::BRIND, MVT::Other);
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/
CodeGenPrepare.cpp 1861 if (TLI.isOperationLegalOrCustom(
4011 return TLI.isOperationLegalOrCustom(
7253 TLI.isOperationLegalOrCustom(
7924 !TLI->isOperationLegalOrCustom(ISD::BITREVERSE,
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64TargetTransformInfo.cpp 1010 if (TLI->isOperationLegalOrCustom(ISD::MULHU, VT)) {
AArch64ISelLowering.cpp 11011 isOperationLegalOrCustom(ISD::FMA, getValueType(DL, Ty)) &&
11867 if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT))
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLowering.cpp 2088 return isOperationLegalOrCustom(ISD::FMA, VT);
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 18959 if (!isOperationLegalOrCustom(ISD::ADDCARRY, HalfT) ||
18960 !isOperationLegalOrCustom(ISD::UADDO, HalfT))
19264 if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT))
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp 5331 if (!isOperationLegalOrCustom(ISD::EXTRACT_SUBVECTOR, ResVT))
9097 if (!TLI.isOperationLegalOrCustom(ISD::INSERT_VECTOR_ELT, VT))
10387 (isOperationLegalOrCustom(ISD::INSERT_VECTOR_ELT, VT) ||
10388 isOperationLegalOrCustom(ISD::VECTOR_SHUFFLE, VT))) {
    [all...]

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