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  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCTOCRegDeps.cpp 113 const bool isPPC64 =
114 MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64();
115 const unsigned TOCReg = isPPC64 ? PPC::X2 : PPC::R2;
PPCSubtarget.cpp 57 IsPPC64(TargetTriple.getArch() == Triple::ppc64 ||
165 if (IsPPC64 && has64BitSupport())
173 if (HasSPE && IsPPC64)
206 CriticalPathRCs.push_back(isPPC64() ?
241 bool PPCSubtarget::isPPC64() const { return TM.isPPC64(); }
244 return isPPC64() && hasPCRelativeMemops() && isELFv2ABI() &&
PPCFrameLowering.cpp 44 return STI.isPPC64() ? 16 : 8;
46 return STI.isPPC64() ? 16 : 4;
51 return STI.isPPC64() ? 40 : 20;
57 return STI.isPPC64() ? -8U : -4U;
61 if (STI.isAIXABI() || STI.isPPC64())
62 return (STI.isELFv2ABI() ? 4 : 6) * (STI.isPPC64() ? 8 : 4);
74 return STI.isPPC64() ? -16U : -8U;
78 return (STI.isAIXABI() && !STI.isPPC64()) ? 4 : 8;
242 if (Subtarget.isPPC64()) {
445 Register R0 = Subtarget.isPPC64() ? PPC::X0 : PPC::R0
    [all...]
PPCSubtarget.h 99 bool IsPPC64;
225 /// isPPC64 - Return true if we are generating code for 64-bit pointer mode.
227 bool isPPC64() const;
311 if (isPPC64())
345 bool is64BitELFABI() const { return isSVR4ABI() && isPPC64(); }
346 bool is32BitELFABI() const { return isSVR4ABI() && !isPPC64(); }
383 return IsPPC64 ? 8 : 4;
389 return IsPPC64 ? 16 : 8;
395 return IsPPC64 ? PPC::X11 : PPC::R11;
401 return IsPPC64 ? PPC::X2 : PPC::R2
    [all...]
PPCTargetMachine.h 60 bool isPPC64() const {
PPCRegisterInfo.cpp 96 : PPCGenRegisterInfo(TM.isPPC64() ? PPC::LR8 : PPC::LR,
97 TM.isPPC64() ? 0 : 1,
98 TM.isPPC64() ? 0 : 1),
146 if (TM.isPPC64())
151 if (TM.isPPC64())
160 if (!TM.isPPC64() && Subtarget.isAIXABI())
189 if (TM.isPPC64()) {
204 if (TM.isPPC64()) {
245 return TM.isPPC64()
255 return TM.isPPC64() ? (Subtarget.hasAltivec() ? CSR_SVR64_ColdCC_Altivec_RegMas
    [all...]
PPCAsmPrinter.cpp 555 ((Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::X3) ||
556 (!Subtarget->isPPC64() && MI->getOperand(0).getReg() == PPC::R3)) &&
559 ((Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::X3) ||
560 (!Subtarget->isPPC64() && MI->getOperand(1).getReg() == PPC::R3)) &&
568 Register VarOffsetReg = Subtarget->isPPC64() ? PPC::X4 : PPC::R4;
598 MCInstBuilder(Subtarget->isPPC64() ? Opcode
627 const bool IsPPC64 = Subtarget->isPPC64();
671 [IsPPC64, getTOCRelocAdjustedExprForXCOFF,
675 const unsigned EntryByteSize = IsPPC64 ? 8 : 4
    [all...]
PPCTargetTransformInfo.cpp 305 if (ST->isPPC64() &&
454 isLargeIntegerTy(!TM.isPPC64(), SrcType) ||
455 isLargeIntegerTy(!TM.isPPC64(), DstType))
656 isLargeIntegerTy(!TM.isPPC64(), CI->getSrcTy()->getScalarType()) ||
657 isLargeIntegerTy(!TM.isPPC64(), CI->getDestTy()->getScalarType()))
659 } else if (isLargeIntegerTy(!TM.isPPC64(),
666 } else if (!TM.isPPC64() &&
783 HWLoopInfo.CountType = TM.isPPC64() ?
879 return TypeSize::getFixed(ST->isPPC64() ? 64 : 32);
PPCISelLowering.cpp 145 bool isPPC64 = Subtarget.isPPC64();
146 setMinStackArgumentAlignment(isPPC64 ? Align(8) : Align(4));
228 if (isPPC64 || Subtarget.hasFPCVT()) {
231 isPPC64 ? MVT::i64 : MVT::i32);
234 isPPC64 ? MVT::i64 : MVT::i32);
238 isPPC64 ? MVT::i64 : MVT::i32);
241 isPPC64 ? MVT::i64 : MVT::i32);
245 isPPC64 ? MVT::i64 : MVT::i32);
248 isPPC64 ? MVT::i64 : MVT::i32)
    [all...]
PPCInstrInfo.cpp 93 STI.isPPC64() ? PPC::BLR8 : PPC::BLR),
631 if (!(Subtarget.isPPC64() && Subtarget.hasP9Vector() &&
691 assert((Subtarget.isPPC64() && Subtarget.hasP9Vector() &&
1276 bool isPPC64 = Subtarget.isPPC64();
1342 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
1353 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
1410 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
1424 Cond.push_back(MachineOperand::CreateReg(isPPC64 ? PPC::CTR8 : PPC::CTR,
1490 bool isPPC64 = Subtarget.isPPC64()
    [all...]
PPCBoolRetToInt.cpp 95 Type *IntTy = ST->isPPC64() ? Type::getInt64Ty(V->getContext())
PPCTLSDynamicCall.cpp 52 bool Is64Bit = MBB.getParent()->getSubtarget<PPCSubtarget>().isPPC64();
PPCISelDAGToDAG.cpp 3886 if (TM.getOptLevel() == CodeGenOpt::None || !TM.isPPC64())
4299 bool isPPC64 = (PtrVT == MVT::i64);
4321 if (isPPC64) break;
4349 if (isPPC64) break;
4359 if (isPPC64) break;
5249 bool IsPPC64 = Subtarget->isPPC64();
5250 if (IsPPC64 && isInt64Immediate(N->getOperand(1), Imm64) &&
5272 bool IsPPC64 = Subtarget->isPPC64();
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/MCTargetDesc/
PPCMCTargetDesc.cpp 70 bool isPPC64 =
72 unsigned Flavour = isPPC64 ? 0 : 1;
73 unsigned RA = isPPC64 ? PPC::LR8 : PPC::LR;
98 bool isPPC64 = (TheTriple.getArch() == Triple::ppc64 ||
103 MAI = new PPCXCOFFMCAsmInfo(isPPC64, TheTriple);
105 MAI = new PPCELFMCAsmInfo(isPPC64, TheTriple);
108 unsigned Reg = isPPC64 ? PPC::X1 : PPC::R1;
PPCAsmBackend.cpp 222 bool Is64 = TT.isPPC64();
245 if (TT.isPPC64()) {
PPCMCCodeEmitter.cpp 388 bool isPPC64 = TT.isPPC64();
389 return CTX.getRegisterInfo()->getEncodingValue(isPPC64 ? PPC::X13 : PPC::R2);
PPCInstPrinter.cpp 460 if (!TT.isPPC64())
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/AsmParser/
PPCAsmParser.cpp 100 bool IsPPC64;
104 bool isPPC64() const { return IsPPC64; }
147 IsPPC64 = TheTriple.isPPC64();
177 bool IsPPC64;
210 IsPPC64 = o.IsPPC64;
242 /// isPPC64 - True if this operand is for an instruction in 64-bit mode.
243 bool isPPC64() const { return IsPPC64;
    [all...]
  /src/external/apache2/llvm/dist/llvm/include/llvm/ADT/
Triple.h 768 bool isPPC64() const {
  /src/external/apache2/llvm/dist/llvm/lib/Analysis/
TargetLibraryInfo.cpp 140 if (T.isPPC64() || T.getArch() == Triple::sparcv9 ||
  /src/external/apache2/llvm/dist/clang/lib/Sema/
Sema.cpp 382 if (Context.getTargetInfo().getTriple().isPPC64() &&
SemaDecl.cpp 8132 if (Context.getTargetInfo().getTriple().isPPC64() &&
10813 if (Context.getTargetInfo().getTriple().isPPC64() &&
13896 if (Context.getTargetInfo().getTriple().isPPC64() &&
16946 if (Context.getTargetInfo().getTriple().isPPC64() &&
SemaExprCXX.cpp 888 if (Ex && Context.getTargetInfo().getTriple().isPPC64())
  /src/external/apache2/llvm/dist/clang/lib/CodeGen/
CodeGenModule.cpp 1039 if (TT.isPPC64())
  /src/external/apache2/llvm/dist/clang/lib/AST/
ASTContext.cpp 1438 if (Target.getTriple().isPPC64() &&

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