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    Searched refs:isShiftedUInt (Results 1 - 11 of 11) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonInstrInfo.cpp 2750 return isShiftedUInt<6,1>(Offset);
2755 return isShiftedUInt<6,2>(Offset);
2840 return isShiftedUInt<6,1>(Offset);
2846 return isShiftedUInt<6,2>(Offset);
2852 return isShiftedUInt<6,3>(Offset);
3839 isShiftedUInt<5,2>(MI.getOperand(2).getImm()))
3844 isShiftedUInt<4,2>(MI.getOperand(2).getImm())))
3876 isShiftedUInt<3,1>(MI.getOperand(2).getImm()))
3898 isShiftedUInt<5,3>(MI.getOperand(2).getImm()))
3961 isShiftedUInt<5,2>(MI.getOperand(1).getImm())
    [all...]
  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/MCTargetDesc/
HexagonMCInstrInfo.h 196 return isShiftedUInt<N, S>(minConstant(MCI, Index));
HexagonMCDuplexInfo.cpp 565 if (!isShiftedUInt<6, 0>(Value))
  /src/external/apache2/llvm/dist/llvm/lib/Target/RISCV/AsmParser/
RISCVAsmParser.cpp 561 return IsConstantImm && isShiftedUInt<5, 2>(Imm) &&
571 return IsConstantImm && isShiftedUInt<6, 2>(Imm) &&
581 return IsConstantImm && isShiftedUInt<5, 3>(Imm) &&
593 return IsConstantImm && isShiftedUInt<6, 3>(Imm) &&
603 return IsConstantImm && isShiftedUInt<8, 2>(Imm) && (Imm != 0) &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/CSKY/AsmParser/
CSKYAsmParser.cpp 145 return IsConstantImm && isShiftedUInt<num, shift>(Imm);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Lanai/AsmParser/
LanaiAsmParser.cpp 220 return isShiftedUInt<23, 2>(static_cast<int32_t>(Value));
234 return Value != 0 && isShiftedUInt<16, 16>(Value);
  /src/external/apache2/llvm/dist/llvm/include/llvm/Support/
MathExtras.h 417 constexpr inline bool isShiftedUInt(uint64_t x) {
419 N > 0, "isShiftedUInt<0> doesn't make sense (refers to a 0-bit number)");
421 "isShiftedUInt<N, S> with N + S > 64 is too wide.");
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 17580 return isShiftedUInt<7,2>(V);
17583 return isShiftedUInt<7,1>(V);
17593 return isShiftedUInt<8, 1>(V);
17596 return isShiftedUInt<8, 2>(V);
17641 return isShiftedUInt<8, 2>(V);
  /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/AsmParser/
MipsAsmParser.cpp 1391 isShiftedUInt<Bits, ShiftLeftAmount>(getConstantImm());
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelLowering.cpp 8060 if (isUInt<12>(CVal) || isShiftedUInt<12, 12>(CVal))
8065 if (isUInt<12>(NVal) || isShiftedUInt<12, 12>(NVal)) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelLowering.cpp 15762 if (isShiftedUInt<16, 16>(Value))

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