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    Searched refs:isUnindexed (Results 1 - 16 of 16) sorted by relevancy

  /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/
HexagonISelLoweringHVX.cpp 1827 assert(cast<LoadSDNode>(Op)->isUnindexed());
1836 assert(cast<StoreSDNode>(Op)->isUnindexed());
1846 assert(MaskN->isUnindexed());
1885 assert(LoadN->isUnindexed() && "Not widening indexed loads yet");
1917 assert(StoreN->isUnindexed() && "Not widening indexed stores yet");
HexagonISelLowering.cpp 2963 if (!LN->isUnindexed())
  /src/external/apache2/llvm/dist/llvm/utils/TableGen/
CodeGenDAGPatterns.cpp 910 if (isUnindexed())
912 "IsUnindexed requires IsLoad or IsStore");
926 if (!isUnindexed() && !isNonExtLoad() && !isAnyExtLoad() &&
948 if (!isUnindexed() && !isTruncStore() && !isNonTruncStore() &&
1070 if (isUnindexed())
1168 bool TreePredicateFn::isUnindexed() const {
1169 return isPredefinedPredicateEqualTo("IsUnindexed", true);
1295 if (isUnindexed())
1298 "IsUnindexed cannot be used with ImmLeaf or its subclasses");
CodeGenDAGPatterns.h 548 bool isUnindexed() const;
GlobalISelEmitter.cpp 217 if (P.isUnindexed())
332 if (Predicate.isUnindexed())
3876 if (Predicate.isUnindexed())
  /src/external/apache2/llvm/dist/llvm/include/llvm/CodeGen/
SelectionDAGNodes.h 2242 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
2343 bool isUnindexed() const { return getAddressingMode() == ISD::UNINDEXED; }
  /src/external/apache2/llvm/dist/llvm/lib/CodeGen/SelectionDAG/
DAGCombiner.cpp 9708 MST->isUnindexed() && !MST->isCompressingStore() &&
9765 MLD->isUnindexed() && !MLD->isExpandingLoad() &&
10868 LN00->getExtensionType() != ISD::ZEXTLOAD && LN00->isUnindexed()) {
11205 LN00->getExtensionType() != ISD::SEXTLOAD && LN00->isUnindexed()) {
15708 if (OptLevel != CodeGenOpt::None && LD->isUnindexed() && !LD->isAtomic()) {
15723 if (LD->isUnindexed()) {
17808 ST->isUnindexed()) {
17826 if (Value.isUndef() && ST->isUnindexed())
17830 if (OptLevel != CodeGenOpt::None && ST->isUnindexed() && !ST->isAtomic()) {
17854 if (ST->isUnindexed()) {
    [all...]
LegalizeVectorTypes.cpp 356 assert(N->isUnindexed() && "Indexed vector load?");
792 assert(N->isUnindexed() && "Indexed store of one-element vector?");
1730 assert(MLD->isUnindexed() && "Indexed masked load during type legalization!");
2574 assert(N->isUnindexed() && "Indexed masked store of vector?");
2714 assert(N->isUnindexed() && "Indexed store of vector?");
TargetLowering.cpp 3655 if (Lod->isSimple() && Lod->isUnindexed()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/
ARMISelLowering.cpp 9496 assert(LD->isUnindexed() && "Expected a unindexed load");
9529 assert(LD->isUnindexed() && "Loads should be unindexed at this point.");
9551 assert(ST->isUnindexed() && "Expected a unindexed store");
9585 assert(ST->isUnindexed() && "Stores should be unindexed at this point.");
14069 if (LN0->hasOneUse() && LN0->isUnindexed() &&
15107 if (LD && Op.hasOneUse() && LD->isUnindexed() &&
15224 if (!St->isSimple() || St->isTruncatingStore() || !St->isUnindexed())
15332 if (!St->isSimple() || St->isTruncatingStore() || !St->isUnindexed())
ARMISelDAGToDAG.cpp 3444 if (Subtarget->isThumb1Only() && ST->isUnindexed()) {
  /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/
AArch64ISelDAGToDAG.cpp 1270 if (LD->isUnindexed())
  /src/external/apache2/llvm/dist/llvm/lib/Target/PowerPC/
PPCISelDAGToDAG.cpp 5520 if (LD->isUnindexed() && LD->hasOneUse() && Op1.hasOneUse() &&
PPCISelLowering.cpp 14746 if (cast<StoreSDNode>(N)->isUnindexed() && Opcode == ISD::BSWAP &&
14934 if (LD->isUnindexed() && VT.isVector() &&
  /src/external/apache2/llvm/dist/llvm/lib/Target/SystemZ/
SystemZISelLowering.cpp 4986 if (Op.getOpcode() == ISD::LOAD && cast<LoadSDNode>(Op)->isUnindexed())
  /src/external/apache2/llvm/dist/llvm/lib/Target/X86/
X86ISelLowering.cpp     [all...]

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