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Searched refs:itmr (Results 1 - 3 of 3) sorted by relevancy

/src/external/gpl3/gdb/dist/sim/mips/
dv-tx3904tmr.c	61 16: ITMR: interval timer mode register 170 unsigned_4 itmr; member in struct:tx3904tmr 171 #define GET_ITMR_TIIE(c) (((c)->itmr & 0x8000) >> 15) 172 #define SET_ITMR_TIIE(c,v) BLIT32((c)->itmr, 15, (v) ? 1 : 0) 173 #define GET_ITMR_TZCE(c) (((c)->itmr & 0x0001) >> 0) 174 #define SET_ITMR_TZCE(c,v) BLIT32((c)->itmr, 0, (v) ? 1 : 0) 262 controller->itmr = 297 controller->itmr = 345 case ITMR_REG: register_value = controller->itmr; break; 406 /* HW_TRACE ((me, "itmr: %08lx", (long) controller->itmr)); * [all...]
/src/external/gpl3/gdb.old/dist/sim/mips/
dv-tx3904tmr.c	61 16: ITMR: interval timer mode register 170 unsigned_4 itmr; member in struct:tx3904tmr 171 #define GET_ITMR_TIIE(c) (((c)->itmr & 0x8000) >> 15) 172 #define SET_ITMR_TIIE(c,v) BLIT32((c)->itmr, 15, (v) ? 1 : 0) 173 #define GET_ITMR_TZCE(c) (((c)->itmr & 0x0001) >> 0) 174 #define SET_ITMR_TZCE(c,v) BLIT32((c)->itmr, 0, (v) ? 1 : 0) 262 controller->itmr = 297 controller->itmr = 345 case ITMR_REG: register_value = controller->itmr; break; 406 /* HW_TRACE ((me, "itmr: %08lx", (long) controller->itmr)); * [all...]
/src/sys/lib/libkern/arch/hppa/
milli.S	`209 itmr: .equ 16 ; Interval Timer label`

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