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Searched refs:ixCG_DISPLAY_GAP_CNTL (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_0_0_d.h	`711 #define ixCG_DISPLAY_GAP_CNTL 0xc0200060`
smu_7_0_1_d.h	`1202 #define ixCG_DISPLAY_GAP_CNTL 0xc0200060`
smu_7_1_0_d.h	`1231 #define ixCG_DISPLAY_GAP_CNTL 0xc0200060`
smu_7_1_1_d.h	`995 #define ixCG_DISPLAY_GAP_CNTL 0xc0200060`
smu_7_1_2_d.h	`1156 #define ixCG_DISPLAY_GAP_CNTL 0xc0200060`
smu_7_1_3_d.h	`1058 #define ixCG_DISPLAY_GAP_CNTL 0xc0200060`
/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_smu7_hwmgr.c	`398 ixCG_DISPLAY_GAP_CNTL); 407 ixCG_DISPLAY_GAP_CNTL, display_gap); 4078 uint32_t display_gap = cgs_read_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL); 4085 cgs_write_ind_register(hwmgr->device, CGS_IND_REG__SMC, ixCG_DISPLAY_GAP_CNTL, display_gap);`

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