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    Searched refs:ixCG_VCLK_CNTL (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_0_0_d.h 41 #define ixCG_VCLK_CNTL 0xc05000a4
smu_7_0_1_d.h 41 #define ixCG_VCLK_CNTL 0xc05000a4
smu_7_1_0_d.h 41 #define ixCG_VCLK_CNTL 0xc05000a4
smu_7_1_1_d.h 41 #define ixCG_VCLK_CNTL 0xc05000a4
smu_7_1_2_d.h 41 #define ixCG_VCLK_CNTL 0xc05000a4
smu_7_1_3_d.h 42 #define ixCG_VCLK_CNTL 0xc05000a4
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_vi.c 849 r = vi_set_uvd_clock(adev, vclk, ixCG_VCLK_CNTL, ixCG_VCLK_STATUS);
amdgpu_cik.c 1417 r = cik_set_uvd_clock(adev, vclk, ixCG_VCLK_CNTL, ixCG_VCLK_STATUS);

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