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    Searched refs:ixDIDT_DBR_EDC_STALL_PATTERN_1_2 (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	7259 #define ixDIDT_DBR_EDC_STALL_PATTERN_1_2 0x0095
gc_9_1_offset.h	7464 #define ixDIDT_DBR_EDC_STALL_PATTERN_1_2 0x0095

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