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    Searched refs:ixDIDT_SQ_EDC_STALL_PATTERN_3_4 (Results 1 - 5 of 5) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_vega10_powertune.c 417 { ixDIDT_SQ_EDC_STALL_PATTERN_3_4, 0xFFFFFFFF, 0, 0x000F0007 },
447 { ixDIDT_SQ_EDC_STALL_PATTERN_3_4, 0xFFFFFFFF, 0, 0x00000000 },
618 { ixDIDT_SQ_EDC_STALL_PATTERN_3_4, DIDT_SQ_EDC_STALL_PATTERN_3_4__EDC_STALL_PATTERN_3_MASK, DIDT_SQ_EDC_STALL_PATTERN_3_4__EDC_STALL_PATTERN_3__SHIFT, 0x1111 },
619 { ixDIDT_SQ_EDC_STALL_PATTERN_3_4, DIDT_SQ_EDC_STALL_PATTERN_3_4__EDC_STALL_PATTERN_4_MASK, DIDT_SQ_EDC_STALL_PATTERN_3_4__EDC_STALL_PATTERN_4__SHIFT, 0x1111 },
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 7155 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 0x0016
gc_9_1_offset.h 7363 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 0x0016
gc_9_2_1_offset.h 7405 #define ixDIDT_SQ_EDC_STALL_PATTERN_3_4 0x0016
gc_10_1_0_offset.h     [all...]

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