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Searched refs:ixLCAC_MC0_OVR_SEL (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_6_0_d.h	`29 #define ixLCAC_MC0_OVR_SEL 0x011D`
smu_8_0_d.h	`635 #define ixLCAC_MC0_OVR_SEL 0xd0208134`
smu_7_0_0_d.h	`728 #define ixLCAC_MC0_OVR_SEL 0xc0400d34`
smu_7_0_1_d.h	`1218 #define ixLCAC_MC0_OVR_SEL 0xc0400d34`
smu_7_1_0_d.h	`1247 #define ixLCAC_MC0_OVR_SEL 0xc0400d34`
smu_7_1_1_d.h	`1028 #define ixLCAC_MC0_OVR_SEL 0xc0400134`
smu_7_1_2_d.h	`1179 #define ixLCAC_MC0_OVR_SEL 0xc0400134`
smu_7_1_3_d.h	`1111 #define ixLCAC_MC0_OVR_SEL 0xc0400134`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_kv_dpm.c	`543 WREG32_SMC(ixLCAC_MC0_OVR_SEL, 0);`

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