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Searched refs:ixMPLL_BYPASSCLK_SEL (Results 1 - 11 of 11) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_polaris_baco.c	`72 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL }, 112 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL }, 164 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },`
amdgpu_ci_baco.c	`84 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL }, 117 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },`
amdgpu_fiji_baco.c	`82 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL }, 100 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },`
amdgpu_tonga_baco.c	`82 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL }, 108 { CMD_WRITE, mmGCK_SMC_IND_INDEX, 0, 0, 0, ixMPLL_BYPASSCLK_SEL },`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/smu/
smu_7_0_0_d.h	`57 #define ixMPLL_BYPASSCLK_SEL 0xc050019c`
smu_7_0_1_d.h	`58 #define ixMPLL_BYPASSCLK_SEL 0xc050019c`
smu_7_1_0_d.h	`57 #define ixMPLL_BYPASSCLK_SEL 0xc050019c`
smu_7_1_1_d.h	`57 #define ixMPLL_BYPASSCLK_SEL 0xc050019c`
smu_7_1_2_d.h	`58 #define ixMPLL_BYPASSCLK_SEL 0xc050019c`
smu_7_1_3_d.h	`61 #define ixMPLL_BYPASSCLK_SEL 0xc050019c`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_cik.c	`1780 orig = data = RREG32_SMC(ixMPLL_BYPASSCLK_SEL); 1784 WREG32_SMC(ixMPLL_BYPASSCLK_SEL, data);`

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