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    Searched refs:ixSYSHUB_MMREG_IND_DMA_CLK0_SW0_CL5_CNTL (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
nbio_6_1_offset.h	3604 #define ixSYSHUB_MMREG_IND_DMA_CLK0_SW0_CL5_CNTL 0x1002c
nbio_7_0_offset.h	4584 #define ixSYSHUB_MMREG_IND_DMA_CLK0_SW0_CL5_CNTL 0x10030

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