/src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
imx6dl-sabrelite.dts | 53 clock-lanes = <0>; 54 data-lanes = <1 2>;
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imx6q-sabrelite.dts | 57 clock-lanes = <0>; 58 data-lanes = <1 2>;
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omap3-n9.dts | 30 clock-lanes = <0>; 31 data-lanes = <1 2>; 53 clock-lanes = <2>; 54 data-lanes = <1 3>;
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imx6q-h100.dts | 202 data-lanes = <1 2 3 4>; 203 clock-lanes = <0>; 342 data-lanes = <1 2 3 4>; 343 clock-lanes = <0>;
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omap3-n950.dts | 83 clock-lanes = <0>; 84 data-lanes = <1 2>; 99 clock-lanes = <2>; 100 data-lanes = <3 1>; 223 lanes = <2 3 0 1 4 5>;
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imx6qdl-wandboard.dtsi | 145 clock-lanes = <0>; 146 data-lanes = <1 2>; 324 clock-lanes = <0>; 325 data-lanes = <1 2>;
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/renesas/ |
hihope-rzg2-ex-aistarvision-mipi-adapter-2.1.dtsi | 18 clock-lanes = <0>; 19 data-lanes = <1 2>; 32 clock-lanes = <0>; 33 data-lanes = <1 2>; 49 clock-lanes = <0>; 50 data-lanes = <1 2>; 63 clock-lanes = <0>; 64 data-lanes = <1 2>;
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r8a774c0-ek874-mipi-2.1.dts | 38 clock-lanes = <0>; 39 data-lanes = <1 2>; 52 clock-lanes = <0>; 53 data-lanes = <1 2>; 62 clock-lanes = <0>; 63 data-lanes = <1 2>;
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/src/sys/arch/mac68k/nubus/ |
nubus.c | 108 u_int8_t lanes; local in function:nubus_attach 139 lanes = fmtblock.bytelanes; 173 lanes, entry); 176 entry = nubus_adjust_ptr(lanes, 179 rsrcid = nubus_read_1(bst, bsh, lanes, entry); 322 * and X is a bitmask of the lanes to ignore. Hence, (X ^ Y) == 0 336 u_int8_t lanes; local in function:nubus_probe_slot 355 lanes = 0xf; 359 for (i = j; i > 0; i--, lanes--) { 361 lanes -= i 611 u_int8_t byte, lanes = fmt->bytelanes; local in function:nubus_find_rsrc 649 u_int8_t lanes = fmt->bytelanes; local in function:nubus_get_ind_data 673 u_int8_t lanes = fmt->bytelanes; local in function:nubus_get_c_string 705 u_int8_t lanes = fmt->bytelanes; local in function:nubus_get_smem_addr_rangelist [all...] |
/src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/engine/disp/ |
nouveau_nvkm_engine_disp_sormcp77.c | 38 .lanes = { 2, 1, 0, 3},
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nouveau_nvkm_engine_disp_sorgk104.c | 38 .lanes = { 2, 1, 0, 3 },
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nouveau_nvkm_engine_disp_sormcp89.c | 38 .lanes = { 3, 2, 1, 0 },
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nouveau_nvkm_engine_disp_sorgm107.c | 52 .lanes = { 0, 1, 2, 3 },
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nouveau_nvkm_engine_disp_sorgt215.c | 54 .lanes = { 2, 1, 0, 3 },
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nouveau_nvkm_engine_disp_sorgm200.c | 36 const u32 shift = sor->func->dp.lanes[ln] * 8; 111 .lanes = { 0, 1, 2, 3 },
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nouveau_nvkm_engine_disp_sortu102.c | 83 .lanes = { 0, 1, 2, 3 },
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/marvell/ |
cn9132-db.dtsi | 66 * lanes not being connected. Prevent the port for being 107 /* Generic PHY, providing serdes lanes */ 155 num-lanes = <2>; 157 /* Generic PHY, providing serdes lanes */ 165 num-lanes = <1>; 167 /* Generic PHY, providing serdes lanes */ 176 /* Generic PHY, providing serdes lanes */ 223 /* Generic PHY, providing serdes lanes */
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cn9131-db.dtsi | 48 * lanes not being connected. Prevent the port for being 89 /* Generic PHY, providing serdes lanes */ 114 num-lanes = <2>; 118 /* Generic PHY, providing serdes lanes */ 128 /* Generic PHY, providing serdes lanes */ 202 /* Generic PHY, providing serdes lanes */
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/src/sys/external/isc/libsodium/dist/src/libsodium/crypto_pwhash/argon2/ |
argon2.c | 44 /* Minimum memory_blocks = 8L blocks, where L is the number of lanes */ 47 if (memory_blocks < 2 * ARGON2_SYNC_POINTS * context->lanes) { 48 memory_blocks = 2 * ARGON2_SYNC_POINTS * context->lanes; 51 segment_length = memory_blocks / (context->lanes * ARGON2_SYNC_POINTS); 53 memory_blocks = segment_length * (context->lanes * ARGON2_SYNC_POINTS); 61 instance.lanes = context->lanes; 125 context.lanes = parallelism;
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argon2-core.c | 197 for (l = 1; l < instance->lanes; ++l) { 227 if (instance == NULL || instance->lanes == 0) { 234 for (l = 0; l < instance->lanes; ++l) { 332 if (context->m_cost < 8 * context->lanes) { 345 /* Validate lanes */ 346 if (ARGON2_MIN_LANES > context->lanes) { 350 if (ARGON2_MAX_LANES < context->lanes) { 374 for (l = 0; l < instance->lanes; ++l) { 404 STORE32_LE(value, context->lanes);
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argon2-encoding.c | 186 DECIMAL_U32(ctx->lanes); 187 if (ctx->lanes > UINT32_MAX) { 190 ctx->threads = ctx->lanes; 293 SX(ctx->lanes);
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/src/sys/arch/mips/rmi/ |
rmixl_pcievar.h | 44 u_int lanes; member in struct:rmixl_pcie_lnkcfg
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/src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/nvidia/ |
tegra210-p2371-2180.dts | 22 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-0}>, 23 <&{/padctl@7009f000/pads/pcie/lanes/pcie-1}>, 24 <&{/padctl@7009f000/pads/pcie/lanes/pcie-2}>, 25 <&{/padctl@7009f000/pads/pcie/lanes/pcie-3}>; 31 phys = <&{/padctl@7009f000/pads/pcie/lanes/pcie-4}>;
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tegra186-p3509-0000+p3636-0001.dts | 143 lanes { 164 lanes { 217 phys = <&{/padctl@3520000/pads/usb2/lanes/usb2-0}>, 218 <&{/padctl@3520000/pads/usb2/lanes/usb2-1}>, 219 <&{/padctl@3520000/pads/usb2/lanes/usb2-2}>, 220 <&{/padctl@3520000/pads/usb3/lanes/usb3-1}>; 290 nvidia,num-lanes = <2>; 295 nvidia,num-lanes = <1>; 300 nvidia,num-lanes = <1>;
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/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
power_state.h | 93 unsigned int lanes; member in struct:PP_StatePcieBlock
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