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  /src/sys/arch/arm/dts/
sun8i-h3-orangepi-plus2e.dts 35 clock-latency-ns = <244144>;
41 clock-latency-ns = <244144>;
  /src/sys/arch/powerpc/booke/
e500_timer.c 101 uint64_t latency = now - (ci->ci_lastintr + cpu->cpu_ticks_per_clock_intr); local
103 uint64_t orig_latency = latency;
106 latency = 0;
108 nticks = 1 + latency / cpu->cpu_ticks_per_clock_intr;
109 latency %= cpu->cpu_ticks_per_clock_intr;
111 for (nticks = 1; latency >= cpu->cpu_ticks_per_clock_intr; nticks++) {
112 latency -= cpu->cpu_ticks_per_clock_intr;
125 printf("%s: nticks=%u lastintr=%#"PRIx64"(%#"PRIx64") now=%#"PRIx64" latency=%#"PRIx64" orig=%#"PRIx64"\n", __func__,
126 nticks, ci->ci_lastintr, now - latency, now, latency, orig_latency)
    [all...]
  /src/games/adventure/
wizard.c 82 latency = 45;
94 if (delay >= latency) {
100 if (delay <= latency / 3) {
hdr.h 72 extern int saveday, savet, maxscore, latency;
save.c 487 {&latency, sizeof(latency)},
600 &latency,
init.c 71 int saveday, savet, maxscore, latency; variable
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/allwinner/
sun8i-a33.dtsi 56 clock-latency-ns = <244144>; /* 8 32k periods */
62 clock-latency-ns = <244144>; /* 8 32k periods */
68 clock-latency-ns = <244144>; /* 8 32k periods */
74 clock-latency-ns = <244144>; /* 8 32k periods */
80 clock-latency-ns = <244144>; /* 8 32k periods */
86 clock-latency-ns = <244144>; /* 8 32k periods */
92 clock-latency-ns = <244144>; /* 8 32k periods */
98 clock-latency-ns = <244144>; /* 8 32k periods */
104 clock-latency-ns = <244144>; /* 8 32k periods */
110 clock-latency-ns = <244144>; /* 8 32k periods *
    [all...]
sun5i-a13.dtsi 104 clock-latency = <244144>; /* 8 32k periods */
sun8i-h3.dtsi 54 clock-latency-ns = <244144>; /* 8 32k periods */
60 clock-latency-ns = <244144>; /* 8 32k periods */
66 clock-latency-ns = <244144>; /* 8 32k periods */
sun8i-a83t.dtsi 210 clock-latency-ns = <244144>; /* 8 32k periods */
216 clock-latency-ns = <244144>; /* 8 32k periods */
222 clock-latency-ns = <244144>; /* 8 32k periods */
228 clock-latency-ns = <244144>; /* 8 32k periods */
234 clock-latency-ns = <244144>; /* 8 32k periods */
240 clock-latency-ns = <244144>; /* 8 32k periods */
246 clock-latency-ns = <244144>; /* 8 32k periods */
252 clock-latency-ns = <244144>; /* 8 32k periods */
263 clock-latency-ns = <244144>; /* 8 32k periods */
269 clock-latency-ns = <244144>; /* 8 32k periods *
    [all...]
sun8i-a33-sinlinx-sina33.dts 88 clock-latency-ns = <244144>; /* 8 32k periods */
94 clock-latency-ns = <244144>; /* 8 32k periods */
sun8i-r16-bananapi-m2m.dts 111 clock-latency-ns = <244144>; /* 8 32k periods */
117 clock-latency-ns = <244144>; /* 8 32k periods */
  /src/sys/dev/cardbus/
adv_cardbus.c 112 u_int8_t latency = 0x20; local
121 latency = 0;
126 latency = 0;
188 * Make sure the latency timer is set to some reasonable
192 if (PCI_LATTIMER(reg) < latency) {
194 reg |= (latency << PCI_LATTIMER_SHIFT);
njata_cardbus.c 132 uint8_t latency = 0x20; local
197 * Make sure the latency timer is set to some reasonable
201 if (PCI_LATTIMER(reg) < latency) {
203 reg |= (latency << PCI_LATTIMER_SHIFT);
njs_cardbus.c 128 u_int8_t latency = 0x20; local
190 * Make sure the latency timer is set to some reasonable
194 if (PCI_LATTIMER(reg) < latency) {
196 reg |= (latency << PCI_LATTIMER_SHIFT);
  /src/sys/dev/pci/bktr/
bktr_os.c 333 u_int latency; local
436 * PCI latency timer. 32 is a good value for 4 bus mastering slots, if
442 latency = pci_read_config(dev, PCI_LATENCY_TIMER, 4);
443 latency = (latency >> 8) & 0xff;
445 if (latency)
446 printf("brooktree%d: PCI bus latency is", unit);
448 printf("brooktree%d: PCI bus latency was 0 changing to",
451 if (!latency) {
452 latency = BROOKTREE_DEF_LATENCY_VALUE
940 u_int latency; local
1395 u_int latency; local
    [all...]
  /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/
juno-r1.dts 73 entry-latency-us = <300>;
74 exit-latency-us = <1200>;
82 entry-latency-us = <400>;
83 exit-latency-us = <1200>;
juno-r2.dts 73 entry-latency-us = <300>;
74 exit-latency-us = <1200>;
82 entry-latency-us = <400>;
83 exit-latency-us = <1200>;
juno.dts 72 entry-latency-us = <300>;
73 exit-latency-us = <1200>;
81 entry-latency-us = <400>;
82 exit-latency-us = <1200>;
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/arm/
arm-realview-pbx-a9.dts 77 arm,tag-latency = <1 1 1>;
78 arm,data-latency = <1 1 1>;
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
dm_pp_interface.h 107 * Memory clock DPMS with this latency or below is allowed, DPMS with
108 * higher latency not allowed.
168 uint32_t latency[MAX_NUM_CLOCKS]; member in struct:amd_pp_clocks
  /src/sys/external/bsd/drm2/dist/drm/i915/
intel_pm.c 290 const struct cxsr_latency *latency; local
297 latency = &cxsr_latency_table[i];
298 if (is_desktop == latency->is_desktop &&
299 is_ddr3 == latency->is_ddr3 &&
300 fsb == latency->fsb_freq && mem == latency->mem_freq)
301 return latency;
456 * Latency for FIFO fetches is dependent on several factors:
467 * platforms but not overly aggressive on lower latency configs.
646 * @latency: Memory wakeup latency in 0.1us unit
874 const struct cxsr_latency *latency; local
1129 unsigned int latency = dev_priv->wm.pri_latency[level] * 10; local
3002 unsigned int latency = wm[level]; local
3818 int level, latency; local
4719 u32 latency = dev_priv->wm.skl_latency[level]; local
    [all...]
  /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/axis/
artpec6.dtsi 139 arm,data-latency = <1 1 1>;
140 arm,tag-latency = <1 1 1>;
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dce120/
amdgpu_dce120_resource.c 901 unsigned int latency; local
946 latency = 45;
950 mem_clks.data[i].latency_in_us = latency;
952 latency -= 5;
  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
smu10_hwmgr.h 181 uint32_t latency; member in struct:smu10_mclk_latency_entries

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