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    Searched refs:loadline_psi1 (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/
amdgpu_ppatomfwctrl.c 149 (voltage_object->svid2_voltage_obj.loadline_psi1 & 0x20) >> 5;
  /src/sys/external/bsd/drm2/dist/drm/amd/include/
atomfirmware.h 2283 uint8_t loadline_psi1; // bit4:0= loadline setting ( Core Loadline trim and offset trim ), bit5=0:PSI1_L disable =1: PSI1_L enable member in struct:atom_svid2_voltage_object_v4

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