| /src/sys/compat/linux32/common/ |
| linux32_sysinfo.c | 78 si.loads[0] = la->ldavg[0] * LINUX_SYSINFO_LOADS_SCALE / la->fscale;
79 si.loads[1] = la->ldavg[1] * LINUX_SYSINFO_LOADS_SCALE / la->fscale;
80 si.loads[2] = la->ldavg[2] * LINUX_SYSINFO_LOADS_SCALE / la->fscale;
|
| linux32_types.h | 106 netbsd32_u_long loads[3]; member in struct:linux32_sysinfo
|
| /src/sys/arch/sun68k/stand/ |
| README | 8 The 1st-level program is loaded into memory by the PROM. It loads the second
|
| /src/sys/arch/sun2/sun2/ |
| locore.s | 103 | boot loader loads us exactly where we are linked, so we don't have
|
| /src/sys/arch/x68k/stand/xxboot/ |
| boot.S | 4 | (1) IPL (or previous stage loader) loads first 1KB of this primary
7 | (2) The first 1KB loads full primary bootloader (including first 1KB) from
10 | (3) The full primary bootloader loads the secondary bootloader known as
131 | point, so that subsequent moveb loads
|
| /src/sys/compat/linux/common/ |
| linux_misc.h | 71 unsigned long loads[3]; member in struct:linux_sysinfo
|
| linux_misc.c | 1447 si.loads[0] = la->ldavg[0] * LINUX_SYSINFO_LOADS_SCALE / la->fscale;
1448 si.loads[1] = la->ldavg[1] * LINUX_SYSINFO_LOADS_SCALE / la->fscale;
1449 si.loads[2] = la->ldavg[2] * LINUX_SYSINFO_LOADS_SCALE / la->fscale;
|
| /src/sys/arch/arm/dts/ |
| zynq-red-pitaya-122-16.dts | 20 * (I think) loads a bitstream to the FPGA. I reserve the same
|
| /src/sys/arch/sparc64/sparc64/ |
| sunos_sigcode.s | 150 be 1f ! if not, skip the loads
|
| /src/sys/arch/x68k/stand/boot_ufs/ |
| boot.S | 8 | (1) IPL (or previous stage loader) loads first 1KB of this primary
11 | (2) The first 1KB loads full primary bootloader (including first 1KB) from
14 | (3) The full primary bootloader loads the secondary bootloader known as
98 | if MPU <= 010 loads 0x49,
99 | if MPU >= 020 loads 0x90.
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/ |
| sdm660.dtsi | 34 * platform from hanging on high graphics loads.
|
| /src/usr.bin/make/unit-tests/ |
| deptgt-posix.mk | 118 # In that mode, '.POSIX:' just loads <posix.mk>, which works as well.
|
| /src/sys/arch/arm/arm32/ |
| bus_dma.c | 63 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "loads");
65 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced loads");
67 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "coherent loads");
75 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced mbuf loads");
570 STAT_INCR(loads);
713 STAT_INCR(loads);
777 STAT_INCR(loads);
935 * Cortex CPUs can do speculative loads so we need to clean the cache
1209 * 1. loads and stores before DMA buffer may be allocated for the purpose
1217 * 1. stores to DMA buffer. loads can happen later as the buffer is not change
[all...] |
| /src/sys/arch/riscv/riscv/ |
| bus_dma.c | 57 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "loads");
59 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced loads");
61 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "coherent loads");
69 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced mbuf loads");
564 STAT_INCR(loads);
707 STAT_INCR(loads);
771 STAT_INCR(loads);
912 * CPUs can do speculative loads so we need to clean the cache after
1175 * 1. loads and stores before DMA buffer may be allocated for the
1184 * 1. stores to DMA buffer. loads can happen later as the buffer i
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| meson8.dtsi | 184 * code which is responsible for system suspend. It loads a
|
| /src/sys/arch/x86/x86/ |
| bus_dma.c | 138 BUSDMA_EVCNT_DECL(loads);
386 STAT_INCR(loads);
844 * never reorders loads from wp/wt/wb or uc memory, but it
845 * may execute loads from wc/wc+ memory early, e.g. with
982 * using a DMA memory buffer, with loads and stores, and is
990 * barrier is needed for prior loads.
1011 * loads and stores.
1015 * data from the device), prefetched loads are safe. x86
|
| /src/sys/arch/mips/mips/ |
| bus_dma.c | 71 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "loads");
73 EVCNT_INITIALIZER(EVCNT_TYPE_MISC, NULL, "busdma", "bounced loads");
481 STAT_INCR(loads);
|
| /src/common/lib/libc/arch/sparc64/string/ |
| memcpy.S | 672 * alignment for faligndata and loads (sets) the values
678 * Block loads and stores are not properly interlocked.
682 * Block loads require a block load to a different register
1505 membar #Sync ! Finish any pending loads
|
| /src/sys/arch/amiga/amiga/ |
| locore.s | 1020 * that set; the "rte" loads the PC and PSR, which jumps to "init".
|
