| /src/external/apache2/llvm/dist/llvm/lib/Target/ARM/MCTargetDesc/ |
| ARMAddressingModes.h | 668 uint32_t Sign = Imm.lshr(15).getZExtValue() & 1;
669 int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15; // -14 to 15
706 uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
707 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127
734 uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
735 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Hexagon/ |
| HexagonGenExtract.cpp | 105 // (and (shl (lshr x, #sr), #sl), #m)
128 // (and (lshr x, #sr), #m)
143 // (shl (lshr x, #sr), #sl)
174 APInt A = APInt(BW, ~0ULL).lshr(SR).shl(SL);
180 APInt M = CM->getValue().lshr(SL);
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/AArch64/MCTargetDesc/ |
| AArch64AddressingModes.h | 368 uint32_t Sign = Imm.lshr(15).getZExtValue() & 1;
369 int32_t Exp = (Imm.lshr(10).getSExtValue() & 0x1f) - 15; // -14 to 15
394 uint32_t Sign = Imm.lshr(31).getZExtValue() & 1;
395 int32_t Exp = (Imm.lshr(23).getSExtValue() & 0xff) - 127; // -126 to 127
422 uint64_t Sign = Imm.lshr(63).getZExtValue() & 1;
423 int64_t Exp = (Imm.lshr(52).getSExtValue() & 0x7ff) - 1023; // -1022 to 1023
|
| /src/external/apache2/llvm/dist/llvm/lib/Support/ |
| APFixedPoint.cpp | 119 Val = Val.lshr(1);
256 .lshr(CommonFXSema.getScale());
391 .lshr(Scale)
|
| KnownBits.cpp | 221 KnownBits KnownBits::lshr(const KnownBits &LHS, const KnownBits &RHS) { function in class:KnownBits
|
| APInt.cpp | 563 return this->lshr(BitWidth - numBits);
1077 return shl(rotateAmt) | lshr(BitWidth - rotateAmt);
1088 return lshr(rotateAmt) | shl(BitWidth - rotateAmt);
1233 t = signedMin + (d.lshr(d.getBitWidth() - 1));
1275 APInt allOnes = APInt::getAllOnesValue(d.getBitWidth()).lshr(LeadingZeros);
2003 APInt Res = lshr(1) * RHS;
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/IR/ |
| ConstantRange.h | 448 ConstantRange lshr(const ConstantRange &Other) const;
|
| /src/external/gpl3/gcc/dist/libgcc/config/ft32/ |
| crti-hw.S | 52 lshr $r1,$r1,20
|
| /src/external/gpl3/gcc.old/dist/libgcc/config/ft32/ |
| crti-hw.S | 52 lshr $r1,$r1,20
|
| /src/external/apache2/llvm/dist/llvm/lib/Transforms/InstCombine/ |
| InstCombineSimplifyDemanded.cpp | 541 APInt DemandedMaskIn(DemandedMask.lshr(ShiftAmt));
588 case Instruction::LShr: {
663 BinaryOperator *LShr = BinaryOperator::CreateLShr(I->getOperand(0),
665 LShr->setIsExact(cast<BinaryOperator>(I)->isExact());
666 return InsertNewInstWith(LShr, *I);
819 APInt DemandedMaskLHS(DemandedMask.lshr(ShiftAmt));
826 RHSKnown.Zero.lshr(BitWidth - ShiftAmt);
828 RHSKnown.One.lshr(BitWidth - ShiftAmt);
1027 bool isLshr = (Shr->getOpcode() == Instruction::LShr);
1028 BitMask1 = isLshr ? (BitMask1.lshr(ShrAmt) << ShlAmt)
[all...] |
| InstCombineCompares.cpp | 1112 /// Handle "(icmp eq/ne (ashr/lshr AP2, A), AP1)" ->
1161 } else if (AP1 == AP2.lshr(Shift)) {
1662 NewCmpCst = C1.lshr(*C3);
1663 NewAndCst = C2.lshr(*C3);
1665 } else if (ShiftOpcode == Instruction::LShr) {
1672 AnyCmpCstBitsShiftedOut = NewCmpCst.lshr(*C3) != C1;
1788 // (icmp pred (and (or (lshr A, B), A), 1), 0) -->
1796 Value *A, *B, *LShr;
1797 if (match(Or, m_Or(m_Value(LShr), m_Value(A))) &&
1798 match(LShr, m_LShr(m_Specific(A), m_Value(B))))
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/Analysis/ |
| DemandedBits.cpp | 167 AB = AOut.lshr(ShiftAmt);
211 AB = AOut.lshr(ShiftAmt);
223 case Instruction::LShr:
|
| /src/external/apache2/llvm/dist/llvm/utils/vim/syntax/ |
| llvm.vim | 31 syn keyword llvmStatement inttoptr invoke landingpad load lshr malloc max min
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/Support/ |
| KnownBits.h | 335 /// Compute known bits for lshr(LHS, RHS).
337 static KnownBits lshr(const KnownBits &LHS, const KnownBits &RHS);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/ |
| InterleavedLoadCombinePass.cpp | 129 // %Pa2 = lshr i64 %Pa1, 1
134 // %Pb2 = lshr i64 %Pb1, 1
148 // Pa_2 = %IDX/2 + 1 #1 | lshr 1
155 // Pb_2 = %IDX/2 + 2 #1 | lshr 1
168 LShr,
330 Polynomial &lshr(const APInt &C) { function in class:__anon4196::Polynomial
457 // Remark: Distributing lshr with and arbitrary number n can be expressed as
458 // ((((B + A) lshr 1) lshr 1) ... ) {n times}.
485 pushBOperation(LShr, C)
[all...] |
| /src/external/apache2/llvm/dist/llvm/lib/IR/ |
| ConstantRange.cpp | 295 APInt::getMaxValue(BitWidth).lshr(ShAmtUMax) + 1);
818 case Instruction::LShr:
819 return lshr(Other);
1353 ConstantRange::lshr(const ConstantRange &Other) const {
1357 APInt max = getUnsignedMax().lshr(Other.getUnsignedMin()) + 1;
1358 APInt min = getUnsignedMin().lshr(Other.getUnsignedMax());
|
| /src/external/apache2/llvm/dist/llvm/lib/Target/Mips/ |
| MipsSEISelDAGToDAG.cpp | 1138 const unsigned Hi = SplatValue.lshr(16).getLoBits(16).getZExtValue();
1161 const unsigned Hi = SplatValue.lshr(16).getLoBits(16).getZExtValue();
1210 const unsigned Hi = SplatValue.lshr(16).getLoBits(16).getZExtValue();
1211 const unsigned Higher = SplatValue.lshr(32).getLoBits(16).getZExtValue();
1212 const unsigned Highest = SplatValue.lshr(48).getLoBits(16).getZExtValue();
|
| /src/external/apache2/llvm/dist/llvm/include/llvm/ADT/ |
| APSInt.h | 142 return IsUnsigned ? APSInt(lshr(Amt), true) : APSInt(ashr(Amt), false);
|
| APInt.h | 208 /// out-of-line slow case for lshr.
987 APInt lshr(unsigned shiftAmt) const { function
1036 APInt lshr(const APInt &ShiftAmt) const { function
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/AsmPrinter/ |
| DwarfExpression.cpp | 240 API = API.lshr(8);
|
| /src/external/apache2/llvm/dist/llvm/lib/CodeGen/GlobalISel/ |
| GISelKnownBits.cpp | 413 Known = KnownBits::lshr(LHSKnown, RHSKnown);
|
| /src/external/gpl3/gcc/dist/libgcc/ |
| libgcc2.h | 292 #define __lshrdi3 __NDW(lshr,3)
|
| /src/external/gpl3/gcc.old/dist/libgcc/ |
| libgcc2.h | 279 #define __lshrdi3 __NDW(lshr,3)
|
| /src/external/gpl3/gdb/dist/sim/testsuite/ft32/ |
| basic.s | 233 lshr.l $r1,$r0,$r2
241 lshr.l $r1,$r0,$r2
|
| /src/external/gpl3/gdb.old/dist/sim/testsuite/ft32/ |
| basic.s | 233 lshr.l $r1,$r0,$r2
241 lshr.l $r1,$r0,$r2
|
