/src/sys/external/bsd/drm2/dist/drm/i915/ |
i915_vgpu.c | 272 unsigned long mappable_base, mappable_size, mappable_end; local in function:intel_vgt_balloon 288 mappable_end = mappable_base + mappable_size; 297 if (mappable_end > ggtt->mappable_end || 298 unmappable_base < ggtt->mappable_end || 305 if (unmappable_base > ggtt->mappable_end) { 307 ggtt->mappable_end, unmappable_base); 329 if (mappable_end < ggtt->mappable_end) { 331 mappable_end, ggtt->mappable_end) [all...] |
intel_region_lmem.c | 114 resource_size_t mappable_end; local in function:intel_setup_fake_lmem 122 mappable_end = pci_resource_len(pdev, 2); 128 mappable_end,
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i915_gem.c | 84 0, ggtt->mappable_end, 996 if (obj->base.size > ggtt->mappable_end) 1016 obj->base.size > ggtt->mappable_end / 2) 1030 vma->fence_size > ggtt->mappable_end / 2)
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i915_vma.c | 623 mappable = vma->node.start + vma->fence_size <= i915_vm_to_ggtt(vma->vm)->mappable_end; 717 end = min_t(u64, end, i915_vm_to_ggtt(vma->vm)->mappable_end);
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/src/sys/external/bsd/drm2/dist/drm/i915/gt/ |
intel_ggtt.c | 65 if (ggtt->mappable_end) { 68 ggtt->gmadr.start, ggtt->mappable_end)) { 73 * Note: mappable_end is the size, not end paddr, of 76 pmap_pv_track(ggtt->gmadr.start, ggtt->mappable_end); 80 ggtt->mappable_end)) { 87 ggtt->mappable_end); 653 if (ggtt->mappable_end) { 659 0, ggtt->mappable_end, 843 if (ggtt->mappable_end) 844 pmap_pv_untrack(ggtt->gmadr.start, ggtt->mappable_end); [all...] |
intel_gtt.h | 351 resource_size_t mappable_end; /* End offset that we can CPU map */ member in struct:i915_ggtt 563 return ggtt->mappable_end > 0;
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/src/sys/external/bsd/drm2/dist/drm/i915/selftests/ |
i915_vma.c | 273 VALID(0, PIN_GLOBAL | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)), 274 VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)), 277 VALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (ggtt->mappable_end - 4096)), 278 INVALID(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | ggtt->mappable_end), 285 VALID(ggtt->mappable_end - 4096, PIN_GLOBAL | PIN_MAPPABLE), 286 VALID(ggtt->mappable_end, PIN_GLOBAL | PIN_MAPPABLE), 287 NOSPACE(ggtt->mappable_end + 4096, PIN_GLOBAL | PIN_MAPPABLE), 292 INVALID(8192, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_FIXED | (ggtt->mappable_end - 4096)), 296 VALID(8192, PIN_GLOBAL | PIN_OFFSET_BIAS | (ggtt->mappable_end - 4096)), 304 NOSPACE(0, PIN_GLOBAL | PIN_MAPPABLE | PIN_OFFSET_BIAS | ggtt->mappable_end), [all...] |
mock_gtt.c | 117 ggtt->mappable_end = resource_size(&ggtt->gmadr);
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i915_gem_gtt.c | 1169 0, ggtt->mappable_end,
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/src/sys/external/bsd/drm2/dist/drm/i915/display/ |
intel_fbdev.c | 292 info->apertures->ranges[0].size = ggtt->mappable_end;
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/src/sys/external/bsd/drm2/dist/drm/i915/gvt/ |
gvt.h | 382 #define gvt_aperture_sz(gvt) (gvt->dev_priv->ggtt.mappable_end)
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/src/sys/external/bsd/drm2/dist/drm/i915/gem/ |
i915_gem_execbuffer.c | 1058 0, ggtt->mappable_end,
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