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    Searched refs:max_dchub_topscl_throughput (Results 1 - 3 of 3) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/
dcn_calcs.h 157 float max_dchub_topscl_throughput; member in struct:dcn_bw_internal_vars
606 int max_dchub_topscl_throughput; /*pixels/dppclk*/ member in struct:dcn_ip_params
  /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/calcs/
amdgpu_dcn_calcs.c 150 .max_dchub_topscl_throughput = 4, /*pixels/dppclk*/
810 v->max_dchub_topscl_throughput = dc->dcn_ip->max_dchub_topscl_throughput;
1656 "max_dchub_topscl_throughput: %d pixels/dppclk\n"
1690 dc->dcn_ip->max_dchub_topscl_throughput,
1740 dc->dml.ip.max_dchub_pscl_bw_pix_per_clk = dc->dcn_ip->max_dchub_topscl_throughput;
amdgpu_dcn_calc_auto.c 329 v->pscl_factor[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] /dcn_bw_ceil2(v->htaps[k] / 6.0, 1.0));
332 v->pscl_factor[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput);
340 v->pscl_factor_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] / 2.0 /dcn_bw_ceil2(v->hta_pschroma[k] / 6.0, 1.0));
343 v->pscl_factor_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput);
1190 v->pscl_throughput[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] /dcn_bw_ceil2(v->htaps[k] / 6.0, 1.0));
1193 v->pscl_throughput[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput);
1202 v->pscl_throughput_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput * v->h_ratio[k] / 2.0 /dcn_bw_ceil2(v->hta_pschroma[k] / 6.0, 1.0));
1205 v->pscl_throughput_chroma[k] =dcn_bw_min2(v->max_dchub_topscl_throughput, v->max_pscl_tolb_throughput);

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