| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
| pll.h | 73 u8 max_n; member in struct:nvbios_pll::__anonee8a8dd00408
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/bios/ |
| nouveau_nvkm_subdev_bios_pll.c | 284 info->vco1.max_n = 0xff;
298 info->vco2.max_n = 0x1f;
301 info->vco2.max_n = 0x28;
318 info->vco1.max_n = nvbios_rd08(bios, data + 21);
322 info->vco2.max_n = nvbios_rd08(bios, data + 25);
347 info->vco1.max_n = nvbios_rd08(bios, data + 17);
351 info->vco2.max_n = nvbios_rd08(bios, data + 21);
369 info->vco1.max_n = nvbios_rd08(bios, data + 11);
383 info->vco1.max_n = nvbios_rd08(bios, data + 16);
422 info->vco1.max_n = 0xff
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/nouveau/nvkm/subdev/clk/ |
| nouveau_nvkm_subdev_clk_pllgt215.c | 69 if (N > info->vco1.max_n)
|
| nouveau_nvkm_subdev_clk_pllnv04.c | 48 int minN = info->vco1.min_n, maxN = info->vco1.max_n;
150 int minN1 = info->vco1.min_n, maxN1 = info->vco1.max_n;
152 int minN2 = info->vco2.min_n, maxN2 = info->vco2.max_n;
|
| gk20a.h | 108 u32 min_n, max_n; member in struct:gk20a_clk_pllg_params
|
| nouveau_nvkm_subdev_clk_gk20a.c | 65 .min_n = 8, .max_n = 255,
160 if (n > clk->params->max_n)
168 if (n > clk->params->max_n)
|
| nouveau_nvkm_subdev_clk_gm20b.c | 160 .min_n = 8, .max_n = 255,
252 if (n >> DFS_DET_RANGE > p->max_n) {
253 nvkm_error(subdev, "ndiv > max_n - setting to max_n...\n");
254 n = p->max_n << DFS_DET_RANGE;
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/dispnv04/ |
| nouveau_dispnv04_hw.c | 276 pv.N1 >= pll_lim.vco1.min_n && pv.N1 <= pll_lim.vco1.max_n &&
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_display.c | 834 int max_n; local in function:g4x_find_best_dpll
843 max_n = limit->n.max;
845 for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
865 max_n = clock.n;
931 int max_n = min(limit->n.max, refclk / 19200); local in function:vlv_find_best_dpll
939 for (clock.n = limit->n.min; clock.n <= max_n; clock.n++) {
|
