| /src/sys/external/bsd/drm2/dist/drm/amd/display/include/ |
| fixed31_32.h | 195 * result = | arg, when min_value < arg < max_value
196 * | max_value, when arg >= max_value
201 struct fixed31_32 max_value)
205 else if (dc_fixpt_le(max_value, arg))
206 return max_value;
|
| /src/usr.sbin/envstat/ |
| envstat.c | 72 int32_t max_value; member in struct:envsys_sensor
727 sensor->max_value = prop_number_signed_value(obj1);
1119 /* Print percentage of max_value */
1122 if (sensor->max_value) { \
1124 ((a) * 100.0) / sensor->max_value); \
1298 /* Print percentage of max_value */
1301 if ((a) && sensor->max_value) { \
1303 ((a) * 100.0) / sensor->max_value); \
1349 if (sensor->percentage && sensor->max_value) {
1352 sensor->max_value);
[all...] |
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/ |
| vega20_ppt.h | 164 int32_t max_value; member in struct:vega20_od8_single_setting
|
| amdgpu_navi10_ppt.c | 780 uint32_t min_value, max_value; local in function:navi10_print_clk_levels
903 NULL, &max_value);
905 min_value, max_value);
910 &min_value, &max_value);
912 min_value, max_value);
917 &min_value, &max_value);
919 min_value, max_value);
921 &min_value, &max_value);
923 min_value, max_value);
925 &min_value, &max_value);
[all...] |
| amdgpu_vega20_ppt.c | 1143 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FMAX].max_value);
1156 od8_settings->od8_settings_array[OD8_SETTING_UCLK_FMAX].max_value);
1167 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ1].max_value);
1170 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE1].max_value);
1173 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ2].max_value);
1176 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE2].max_value);
1179 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_FREQ3].max_value);
1182 od8_settings->od8_settings_array[OD8_SETTING_GFXCLK_VOLTAGE3].max_value);
1672 od8_settings->od8_settings_array[i].max_value =
1678 od8_settings->od8_settings_array[i].max_value = 0
[all...] |
| amdgpu_smu.c | 368 uint32_t *min_value, uint32_t *max_value)
373 if (!min_value && !max_value)
383 if (max_value) {
388 ret = smu_get_dpm_freq_by_index(smu, clk_type, level_count - 1, max_value);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/hwmgr/ |
| amdgpu_vega20_hwmgr.c | 1350 od8_settings->od8_settings_array[i].max_value =
1357 od8_settings->od8_settings_array[i].max_value =
1394 value > od8_settings[OD8_SETTING_GFXCLK_FMAX].max_value)
1419 value > od8_settings[OD8_SETTING_UCLK_FMAX].max_value)
2957 input_clk > od8_settings[OD8_SETTING_GFXCLK_FMAX].max_value) {
2961 od8_settings[OD8_SETTING_GFXCLK_FMAX].max_value);
3000 input_clk > od8_settings[OD8_SETTING_UCLK_FMAX].max_value) {
3004 od8_settings[OD8_SETTING_UCLK_FMAX].max_value);
3047 input_clk > od8_settings[od8_id].max_value) {
3051 od8_settings[od8_id].max_value);
[all...] |
| vega20_hwmgr.h | 428 int32_t max_value; member in struct:vega20_od8_single_setting
|
| /src/sys/external/bsd/drm2/dist/drm/i915/display/ |
| intel_sdvo_regs.h | 572 u8 max_value; member in struct:sdvo_max_backlight_reply
639 u16 max_value; member in struct:intel_sdvo_enhancement_limits_reply
|
| intel_sprite.c | 596 keymax = (key->max_value & 0xffffff) | PLANE_KEYMAX_ALPHA(alpha);
1054 I915_WRITE_FW(SPKEYMAXVAL(pipe, plane_id), key->max_value);
1472 I915_WRITE_FW(SPRKEYMAX(pipe), key->max_value);
1783 I915_WRITE_FW(DVSKEYMAX(pipe), key->max_value);
|
| /src/usr.bin/xlint/lint1/ |
| tree.c | 1095 uint64_t max_value, bool *overflow)
1099 return ~l & max_value;
1103 return -l & max_value;
1105 *overflow = r > 0 && l > max_value / r;
1111 return max_value;
1122 *overflow = l > max_value - r;
1160 int64_t min_value, int64_t max_value, bool *overflow)
1174 uint64_t max_prod = (uint64_t)max_value + (neg ? 1 : 0);
1177 return neg ? min_value : max_value;
1184 return max_value;
1285 int64_t max_value = (int64_t)(mask >> 1); local in function:fold_constant_integer
[all...] |
| /src/sys/external/bsd/compiler_rt/dist/lib/sanitizer_common/ |
| sanitizer_allocator_primary64.h | 323 // counter's max_value. Ctor will try to allocate the required buffer via
328 // is not incremented past max_value.
332 PackedCounterArray(u64 num_counters, u64 max_value, MemoryMapperT *mapper)
335 CHECK_GT(max_value, 0);
340 RoundUpToPowerOfTwo(MostSignificantSetBitIndex(max_value) + 1);
|
| /src/sys/external/bsd/drm2/dist/drm/amd/powerplay/inc/ |
| amdgpu_smu.h | 716 uint32_t *min_value, uint32_t *max_value);
|
| /src/sys/external/bsd/drm2/dist/include/uapi/drm/ |
| i915_drm.h | 1509 __u32 max_value; member in struct:drm_intel_sprite_colorkey
|
