| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/hw/ |
| mcif_wb.h | 1 /* $NetBSD: mcif_wb.h,v 1.2 2021/12/18 23:45:05 riastradh Exp $ */
69 struct mcif_wb { struct
77 void (*enable_mcif)(struct mcif_wb *mcif_wb);
79 void (*disable_mcif)(struct mcif_wb *mcif_wb);
82 struct mcif_wb *mcif_wb,
87 struct mcif_wb *mcif_wb,
[all...] |
| dwb.h | 36 /* forward declaration of mcif_wb struct */
37 struct mcif_wb;
107 struct mcif_wb *mcif;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn20/ |
| amdgpu_dcn20_mmhubbub.c | 34 #include "mcif_wb.h"
81 static void mmhubbub2_config_mcif_buf(struct mcif_wb *mcif_wb,
85 struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);
158 static void mmhubbub2_config_mcif_arb(struct mcif_wb *mcif_wb,
161 struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);
212 void mmhubbub2_config_mcif_irq(struct mcif_wb *mcif_wb,
215 struct dcn20_mmhubbub *mcif_wb20 = TO_DCN20_MMHUBBUB(mcif_wb);
[all...] |
| dcn20_mmhubbub.h | 62 SRI(MCIF_WB_BUFMGR_SW_CONTROL, MCIF_WB, inst),\
63 SRI(MCIF_WB_BUFMGR_CUR_LINE_R, MCIF_WB, inst),\
64 SRI(MCIF_WB_BUFMGR_STATUS, MCIF_WB, inst),\
65 SRI(MCIF_WB_BUF_PITCH, MCIF_WB, inst),\
66 SRI(MCIF_WB_BUF_1_STATUS, MCIF_WB, inst),\
67 SRI(MCIF_WB_BUF_1_STATUS2, MCIF_WB, inst),\
68 SRI(MCIF_WB_BUF_2_STATUS, MCIF_WB, inst),\
69 SRI(MCIF_WB_BUF_2_STATUS2, MCIF_WB, inst),\
70 SRI(MCIF_WB_BUF_3_STATUS, MCIF_WB, inst),\
71 SRI(MCIF_WB_BUF_3_STATUS2, MCIF_WB, inst),
[all...] |
| amdgpu_dcn20_hwseq.c | 50 #include "mcif_wb.h"
1758 struct mcif_wb *mcif_wb; local in function:dcn20_enable_writeback
1764 mcif_wb = dc->res_pool->mcif_wb[wb_info->dwb_pipe_inst];
1769 /* set MCIF_WB buffer and arbitration configuration */
1770 mcif_wb->funcs->config_mcif_buf(mcif_wb, &wb_info->mcif_buf_params, wb_info->dwb_params.dest_height);
1771 mcif_wb->funcs->config_mcif_arb(mcif_wb, &context->bw_ctx.bw.dcn.bw_writeback.mcif_wb_arb[wb_info->dwb_pipe_inst])
1784 struct mcif_wb *mcif_wb; local in function:dcn20_disable_writeback
[all...] |
| amdgpu_dcn20_resource.c | 1385 if (pool->base.mcif_wb[i] != NULL) {
1386 kfree(TO_DCN20_MMHUBBUB(pool->base.mcif_wb[i]));
1387 pool->base.mcif_wb[i] = NULL;
2242 /* Writeback MCIF_WB arbitration parameters */
2784 /* Writeback MCIF_WB arbitration parameters */
3112 pool->mcif_wb[i] = &mcif_wb20->base;
3769 dm_error("DC: failed to create mcif_wb!\n");
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/inc/ |
| core_types.h | 42 #include "mcif_wb.h"
178 struct mcif_wb *mcif_wb[MAX_DWB_PIPES]; member in struct:resource_pool
304 struct mcif_wb *mcif_wb; member in struct:pipe_ctx
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/dcn21/ |
| amdgpu_dcn21_resource.c | 940 if (pool->base.mcif_wb[i] != NULL) {
941 kfree(TO_DCN20_MMHUBBUB(pool->base.mcif_wb[i]));
942 pool->base.mcif_wb[i] = NULL;
1900 dm_error("DC: failed to create mcif_wb!\n");
|
