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    Searched refs:mg_pll_tdc_coldst_bias (Results 1 - 4 of 4) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/i915/display/
intel_dpll_mgr.h 212 u32 mg_pll_tdc_coldst_bias; member in struct:intel_dpll_hw_state
intel_dpll_mgr.c 2880 pll_state->mg_pll_tdc_coldst_bias =
2921 pll_state->mg_pll_tdc_coldst_bias =
2946 pll_state->mg_pll_tdc_coldst_bias &=
3177 hw_state->mg_pll_tdc_coldst_bias =
3178 I915_READ(MG_PLL_TDC_COLDST_BIAS(tc_port));
3188 hw_state->mg_pll_tdc_coldst_bias &= hw_state->mg_pll_tdc_coldst_bias_mask;
3258 hw_state->mg_pll_tdc_coldst_bias =
3260 hw_state->mg_pll_tdc_coldst_bias &= (DKL_PLL_TDC_SSC_STEP_SIZE_MASK |
3395 val = I915_READ(MG_PLL_TDC_COLDST_BIAS(tc_port));
3397 val |= hw_state->mg_pll_tdc_coldst_bias;
    [all...]
intel_display.c 13697 PIPE_CONF_CHECK_X(dpll_hw_state.mg_pll_tdc_coldst_bias);
  /src/sys/external/bsd/drm2/dist/drm/i915/
i915_debugfs.c 2782 seq_printf(m, " mg_pll_tdc_coldst_bias: 0x%08x\n",
2783 pll->state.hw_state.mg_pll_tdc_coldst_bias);

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