| /src/sys/arch/mips/mips/ |
| mips_mcclock.c | 59 * Compute MHz and DELAY() constants using the default
117 * Compute approximate CPU speed in MHz, and an
124 printf("mcclock: iters %d computed MHz %d, instrs per usec=%d\n",
175 * to a CPU speed in MHz.
185 unsigned mhz = 0; local in function:mips_mcclock_to_mhz
193 * iters per 4ms tick = 425 * MHz)
194 * instructions per MHz = kHz * 575
195 * with about 2 MHz slop to allow for variation.
204 mhz = 45;
207 mhz = 50
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/amlogic/ |
| meson-g12b.dtsi | 51 capacity-dmips-mhz = <592>;
61 capacity-dmips-mhz = <592>;
71 capacity-dmips-mhz = <1024>;
81 capacity-dmips-mhz = <1024>;
91 capacity-dmips-mhz = <1024>;
101 capacity-dmips-mhz = <1024>;
|
| meson-gxm.dtsi | 46 capacity-dmips-mhz = <1024>;
50 capacity-dmips-mhz = <1024>;
54 capacity-dmips-mhz = <1024>;
58 capacity-dmips-mhz = <1024>;
66 capacity-dmips-mhz = <1024>;
77 capacity-dmips-mhz = <1024>;
88 capacity-dmips-mhz = <1024>;
99 capacity-dmips-mhz = <1024>;
|
| /src/sys/arch/powerpc/oea/ |
| cpu_speedctl.c | 68 scom_speeds[0] = scom_speeds[0] / 1000000; /* Hz -> MHz */
117 int speed, nspeed = -1, mhz; local in function:sysctl_cpuspeed_temp
121 mhz = scom_speeds[speed];
122 node.sysctl_data = &mhz;
153 int mhz; local in function:sysctl_cpuspeed_cur
158 mhz = scom_speeds[speed];
159 node.sysctl_data = &mhz;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/dc/ |
| dm_pp_smu.h | 120 void (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int mhz);
126 void (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int mhz);
131 void (*set_hard_min_fclk_by_freq)(struct pp_smu *pp, int mhz);
136 void (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int mhz);
180 enum pp_smu_status (*set_hard_min_dcfclk_by_freq)(struct pp_smu *pp, int Mhz);
186 enum pp_smu_status (*set_min_deep_sleep_dcfclk)(struct pp_smu *pp, int Mhz);
191 enum pp_smu_status (*set_hard_min_uclk_by_freq)(struct pp_smu *pp, int Mhz);
196 enum pp_smu_status (*set_hard_min_socclk_by_freq)(struct pp_smu *pp, int Mhz);
205 enum pp_smu_nv_clock_id clock_id, int Mhz);
252 uint32_t Freq; // In MHz
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm/boot/dts/ |
| exynos5420-cpus.dtsi | 66 capacity-dmips-mhz = <1024>;
78 capacity-dmips-mhz = <1024>;
90 capacity-dmips-mhz = <1024>;
102 capacity-dmips-mhz = <1024>;
114 capacity-dmips-mhz = <539>;
126 capacity-dmips-mhz = <539>;
138 capacity-dmips-mhz = <539>;
150 capacity-dmips-mhz = <539>;
|
| exynos5422-cpus.dtsi | 65 capacity-dmips-mhz = <539>;
78 capacity-dmips-mhz = <539>;
91 capacity-dmips-mhz = <539>;
104 capacity-dmips-mhz = <539>;
117 capacity-dmips-mhz = <1024>;
130 capacity-dmips-mhz = <1024>;
143 capacity-dmips-mhz = <1024>;
156 capacity-dmips-mhz = <1024>;
|
| imx6sl-tolino-shine3.dts | 186 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
197 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
230 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
241 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
|
| imx6sll-kobo-clarahd.dts | 196 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
207 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
240 pinctrl_usdhc3_100mhz: usdhc3grp-100mhz {
251 pinctrl_usdhc3_200mhz: usdhc3grp-200mhz {
|
| nuvoton-wpcm450.dtsi | 22 clk24m: clock-24mhz {
23 /* 24 MHz dummy clock */
|
| pxa300-raumfeld-tuneable-clock.dtsi | 6 xo_27mhz: oscillator-27mhz {
|
| imx6sx-softing-vining-2000.dts | 417 pinctrl_usdhc2_50mhz: usdhc2grp-50mhz {
430 pinctrl_usdhc2_100mhz: usdhc2grp-100mhz {
441 pinctrl_usdhc2_200mhz: usdhc2grp-200mhz {
452 pinctrl_usdhc4_50mhz: usdhc4grp-50mhz {
468 pinctrl_usdhc4_100mhz: usdhc4-100mhz {
483 pinctrl_usdhc4_200mhz: usdhc4-200mhz {
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/qcom/ |
| sdm660.dtsi | 20 * 775MHz is only available on the highest speed bin
90 capacity-dmips-mhz = <1024>;
96 capacity-dmips-mhz = <1024>;
102 capacity-dmips-mhz = <1024>;
108 capacity-dmips-mhz = <1024>;
114 capacity-dmips-mhz = <640>;
120 capacity-dmips-mhz = <640>;
126 capacity-dmips-mhz = <640>;
132 capacity-dmips-mhz = <640>;
|
| sm6125.dtsi | 44 capacity-dmips-mhz = <1024>;
56 capacity-dmips-mhz = <1024>;
65 capacity-dmips-mhz = <1024>;
74 capacity-dmips-mhz = <1024>;
83 capacity-dmips-mhz = <1638>;
95 capacity-dmips-mhz = <1638>;
104 capacity-dmips-mhz = <1638>;
113 capacity-dmips-mhz = <1638>;
|
| /src/sys/arch/evbmips/loongson/ |
| loongson_clock.c | 273 int mhz, i; local in function:loongson_cpuspeed_temp
275 mhz = sc_scale[sc_step_wanted];
277 node.sysctl_data = &mhz;
297 int mhz; local in function:loongson_cpuspeed_cur
299 mhz = sc_scale[sc_step];
300 node.sysctl_data = &mhz;
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/arm/ |
| juno-r1.dts | 101 capacity-dmips-mhz = <1024>;
118 capacity-dmips-mhz = <1024>;
135 capacity-dmips-mhz = <578>;
152 capacity-dmips-mhz = <578>;
169 capacity-dmips-mhz = <578>;
186 capacity-dmips-mhz = <578>;
|
| juno-r2.dts | 101 capacity-dmips-mhz = <1024>;
119 capacity-dmips-mhz = <1024>;
137 capacity-dmips-mhz = <485>;
155 capacity-dmips-mhz = <485>;
173 capacity-dmips-mhz = <485>;
191 capacity-dmips-mhz = <485>;
|
| juno.dts | 100 capacity-dmips-mhz = <1024>;
118 capacity-dmips-mhz = <1024>;
136 capacity-dmips-mhz = <578>;
154 capacity-dmips-mhz = <578>;
172 capacity-dmips-mhz = <578>;
190 capacity-dmips-mhz = <578>;
|
| /src/sys/dev/pci/voyager/ |
| pwmclock.c | 339 int mhz, i; local in function:pwmclock_cpuspeed_temp
341 mhz = sc->sc_scale[sc->sc_step_wanted];
343 node.sysctl_data = &mhz;
364 int mhz; local in function:pwmclock_cpuspeed_cur
366 mhz = sc->sc_scale[sc->sc_step];
367 node.sysctl_data = &mhz;
|
| /src/sys/arch/hppa/dev/ |
| cpu.c | 94 u_int mhz = 100 * cpu_ticksnum / cpu_ticksdenom; local in function:cpuattach
124 aprint_normal("%d", mhz / 100);
125 if (mhz % 100 > 9)
126 aprint_normal(".%02d", mhz % 100);
128 aprint_normal(" MHz clk\n%s: %s", device_xname(self),
|
| /src/sys/external/bsd/drm2/dist/drm/nouveau/include/nvkm/subdev/bios/ |
| rammap.h | 17 u32 nvbios_rammapEm(struct nvkm_bios *, u16 mhz,
|
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/mediatek/ |
| mt8192.dtsi | 44 capacity-dmips-mhz = <530>;
55 capacity-dmips-mhz = <530>;
66 capacity-dmips-mhz = <530>;
77 capacity-dmips-mhz = <530>;
88 capacity-dmips-mhz = <1024>;
99 capacity-dmips-mhz = <1024>;
110 capacity-dmips-mhz = <1024>;
121 capacity-dmips-mhz = <1024>;
|
| /src/sys/external/bsd/drm2/dist/drm/amd/display/amdgpu_dm/ |
| amdgpu_dm_pp_smu.c | 655 void pp_rv_set_hard_min_fclk_by_freq(struct pp_smu *pp, int mhz)
665 pp_funcs->set_hard_min_fclk_by_freq(pp_handle, mhz);
752 enum pp_smu_status pp_nv_set_min_deep_sleep_dcfclk(struct pp_smu *pp, int mhz)
762 if (smu_set_deep_sleep_dcefclk(smu, mhz))
769 struct pp_smu *pp, int mhz)
780 clock_req.clock_freq_in_khz = mhz * 1000;
791 enum pp_smu_status pp_nv_set_hard_min_uclk_by_freq(struct pp_smu *pp, int mhz)
802 clock_req.clock_freq_in_khz = mhz * 1000;
827 enum pp_smu_nv_clock_id clock_id, int mhz)
850 clock_req.clock_freq_in_khz = mhz * 1000
[all...] |
| /src/sys/external/gpl2/dts/dist/arch/arm64/boot/dts/freescale/ |
| imx8mm-nitrogen-r2.dts | 598 pinctrl_usdhc1_100mhz: usdhc1-100mhz-grp {
613 pinctrl_usdhc1_200mhz: usdhc1-200mhz-grp {
640 pinctrl_usdhc2_100mhz: usdhc2-100mhz-grp {
651 pinctrl_usdhc2_200mhz: usdhc2-200mhz-grp {
674 pinctrl_usdhc3_100mhz: usdhc3-100mhz-grp {
685 pinctrl_usdhc3_200mhz: usdhc3-200mhz-grp {
|
| /src/sys/dev/mvme/ |
| pcctworeg.h | 224 * value of BCLK in MHz. (PCC2REG_PRESCALE_ADJUST)
226 #define PCCTWO_PRES_ADJ(mhz) (256 - (mhz))
|
