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Searched refs:mmATC_L2_CACHE_4K_EDC_CNT (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v9_0.c	`6211 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT, 0); 6267 data = RREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT); 6355 WREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT, 0); 6374 RREG32_SOC15(GC, 0, mmATC_L2_CACHE_4K_EDC_CNT);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`1155 #define mmATC_L2_CACHE_4K_EDC_CNT 0x0810`

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