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    Searched refs:mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_nbio_v6_1.c 111 WREG32_SOC15(NBIO, 0, mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
nbio_6_1_offset.h 2588 #define mmBIF_BX_PF0_DOORBELL_SELFRING_GPA_APER_BASE_HIGH 0x00f3

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