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    Searched refs:mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL (Results 1 - 2 of 2) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_nbio_v2_3.c 154 WREG32_SOC15(NBIO, 0, mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL,
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/nbio/
nbio_2_3_offset.h 576 #define mmBIF_BX_PF_DOORBELL_SELFRING_GPA_APER_CNTL 0x00f5
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