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Searched refs:mmBL1_PWM_BL_UPDATE_SAMPLE_RATE (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dce/
dce_6_0_d.h	`470 #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x162F`
dce_8_0_d.h	`60 #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x162f`
dce_10_0_d.h	`60 #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x162f`
dce_11_0_d.h	`56 #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x162f`
dce_11_2_d.h	`63 #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x162f`
dce_12_0_offset.h	`1318 #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x03e5 [all...]`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/dcn/
dcn_2_1_0_offset.h	`7151 #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x17b7 [all...]`
dcn_2_0_0_offset.h	`8182 #define mmBL1_PWM_BL_UPDATE_SAMPLE_RATE 0x17b7 [all...]`

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