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    Searched refs:mmCB_HW_CONTROL (Results 1 - 14 of 14) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_si.c 63 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
119 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
302 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
340 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
387 mmCB_HW_CONTROL, 0x00010000, 0x00018208,
amdgpu_mxgpu_vi.c 233 mmCB_HW_CONTROL, 0xfffdf3cf, 0x00007208,
amdgpu_gfx_v9_0.c 536 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0x0000f000, 0x00012107),
573 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
613 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
635 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
679 SOC15_REG_GOLDEN_VALUE(GC, 0, mmCB_HW_CONTROL, 0xfffdf3cf, 0x00014104),
amdgpu_gfx_v8_0.c 206 mmCB_HW_CONTROL, 0xfffdf3cf, 0x00007208,
317 mmCB_HW_CONTROL, 0x0001f3cf, 0x00007208,
348 mmCB_HW_CONTROL, 0x0000f3cf, 0x00007208,
380 mmCB_HW_CONTROL, 0x0001f3cf, 0x00007208,
amdgpu_gfx_v7_0.c 2019 tmp = RREG32(mmCB_HW_CONTROL) & ~0x00010000;
2021 WREG32(mmCB_HW_CONTROL, tmp);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 279 #define mmCB_HW_CONTROL 0x2684
gfx_7_0_d.h 140 #define mmCB_HW_CONTROL 0x2684
gfx_7_2_d.h 140 #define mmCB_HW_CONTROL 0x2684
gfx_8_0_d.h 157 #define mmCB_HW_CONTROL 0x2684
gfx_8_1_d.h 157 #define mmCB_HW_CONTROL 0x2684
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 1040 #define mmCB_HW_CONTROL 0x0680
gc_9_1_offset.h 1010 #define mmCB_HW_CONTROL 0x0680
gc_9_2_1_offset.h 976 #define mmCB_HW_CONTROL 0x0680
gc_10_1_0_offset.h 2958 #define mmCB_HW_CONTROL 0x1424
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