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Searched refs:mmCB_HW_CONTROL_1 (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h	`280 #define mmCB_HW_CONTROL_1 0x2685`
gfx_7_0_d.h	`141 #define mmCB_HW_CONTROL_1 0x2685`
gfx_7_2_d.h	`141 #define mmCB_HW_CONTROL_1 0x2685`
gfx_8_0_d.h	`158 #define mmCB_HW_CONTROL_1 0x2685`
gfx_8_1_d.h	`158 #define mmCB_HW_CONTROL_1 0x2685`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`1042 #define mmCB_HW_CONTROL_1 0x0681`
gc_9_1_offset.h	`1012 #define mmCB_HW_CONTROL_1 0x0681`
gc_9_2_1_offset.h	`978 #define mmCB_HW_CONTROL_1 0x0681`
gc_10_1_0_offset.h	`2960 #define mmCB_HW_CONTROL_1 0x1425 [all...]`

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