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    Searched refs:mmCC_GC_EDC_CONFIG (Results 1 - 8 of 8) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 743 #define mmCC_GC_EDC_CONFIG 0x3098
gfx_7_2_d.h 756 #define mmCC_GC_EDC_CONFIG 0x3098
gfx_8_0_d.h 828 #define mmCC_GC_EDC_CONFIG 0x3098
gfx_8_1_d.h 828 #define mmCC_GC_EDC_CONFIG 0x3098
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v8_0.c 1669 tmp = RREG32(mmCC_GC_EDC_CONFIG);
1671 WREG32(mmCC_GC_EDC_CONFIG, tmp);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2534 #define mmCC_GC_EDC_CONFIG 0x1098
gc_9_1_offset.h 2804 #define mmCC_GC_EDC_CONFIG 0x1098
gc_10_1_0_offset.h 4872 #define mmCC_GC_EDC_CONFIG 0x1e38
    [all...]

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