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    Searched refs:mmCGTS_CU12_SP0_CTRL_REG (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 1547 #define mmCGTS_CU12_SP0_CTRL_REG 0xf044
gfx_7_2_d.h 1568 #define mmCGTS_CU12_SP0_CTRL_REG 0xf044
gfx_8_0_d.h 1761 #define mmCGTS_CU12_SP0_CTRL_REG 0xf044
gfx_8_1_d.h 1729 #define mmCGTS_CU12_SP0_CTRL_REG 0xf044
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6430 #define mmCGTS_CU12_SP0_CTRL_REG 0x5044
gc_9_1_offset.h 6652 #define mmCGTS_CU12_SP0_CTRL_REG 0x5044
gc_9_2_1_offset.h 6664 #define mmCGTS_CU12_SP0_CTRL_REG 0x5044

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