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    Searched refs:mmCGTS_CU15_SP1_CTRL_REG (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 1565 #define mmCGTS_CU15_SP1_CTRL_REG 0xf056
gfx_7_2_d.h 1586 #define mmCGTS_CU15_SP1_CTRL_REG 0xf056
gfx_8_0_d.h 1779 #define mmCGTS_CU15_SP1_CTRL_REG 0xf056
gfx_8_1_d.h 1747 #define mmCGTS_CU15_SP1_CTRL_REG 0xf056
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6466 #define mmCGTS_CU15_SP1_CTRL_REG 0x5056
gc_9_1_offset.h 6688 #define mmCGTS_CU15_SP1_CTRL_REG 0x5056
gc_9_2_1_offset.h 6700 #define mmCGTS_CU15_SP1_CTRL_REG 0x5056

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