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Searched refs:mmCGTS_CU8_SP0_CTRL_REG (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h	`1527 #define mmCGTS_CU8_SP0_CTRL_REG 0xf030`
gfx_7_2_d.h	`1548 #define mmCGTS_CU8_SP0_CTRL_REG 0xf030`
gfx_8_0_d.h	`1741 #define mmCGTS_CU8_SP0_CTRL_REG 0xf030`
gfx_8_1_d.h	`1709 #define mmCGTS_CU8_SP0_CTRL_REG 0xf030`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`6390 #define mmCGTS_CU8_SP0_CTRL_REG 0x5030`
gc_9_1_offset.h	`6612 #define mmCGTS_CU8_SP0_CTRL_REG 0x5030`
gc_9_2_1_offset.h	`6624 #define mmCGTS_CU8_SP0_CTRL_REG 0x5030`

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