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Searched refs:mmCGTS_CU9_SP0_CTRL_REG (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h	`1532 #define mmCGTS_CU9_SP0_CTRL_REG 0xf035`
gfx_7_2_d.h	`1553 #define mmCGTS_CU9_SP0_CTRL_REG 0xf035`
gfx_8_0_d.h	`1746 #define mmCGTS_CU9_SP0_CTRL_REG 0xf035`
gfx_8_1_d.h	`1714 #define mmCGTS_CU9_SP0_CTRL_REG 0xf035`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`6400 #define mmCGTS_CU9_SP0_CTRL_REG 0x5035`
gc_9_1_offset.h	`6622 #define mmCGTS_CU9_SP0_CTRL_REG 0x5035`
gc_9_2_1_offset.h	`6634 #define mmCGTS_CU9_SP0_CTRL_REG 0x5035`

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