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    Searched refs:mmCGTS_TCC_DISABLE (Results 1 - 10 of 10) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_6_0_d.h 301 #define mmCGTS_TCC_DISABLE 0x2452
gfx_7_0_d.h 1485 #define mmCGTS_TCC_DISABLE 0xf003
gfx_7_2_d.h 1506 #define mmCGTS_TCC_DISABLE 0xf003
gfx_8_0_d.h 1699 #define mmCGTS_TCC_DISABLE 0xf003
gfx_8_1_d.h 1667 #define mmCGTS_TCC_DISABLE 0xf003
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c 1724 uint32_t tcc_disable = RREG32_SOC15(GC, 0, mmCGTS_TCC_DISABLE) |
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 6306 #define mmCGTS_TCC_DISABLE 0x5003
gc_9_1_offset.h 6528 #define mmCGTS_TCC_DISABLE 0x5003
gc_9_2_1_offset.h 6540 #define mmCGTS_TCC_DISABLE 0x5003
gc_10_1_0_offset.h 9896 #define mmCGTS_TCC_DISABLE 0x500a
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