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Searched refs:mmCP_CE_IC_OP_CNTL (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c	`2247 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); 2249 WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp); 2253 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); 2524 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL); 2526 WREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL, tmp); 2530 tmp = RREG32_SOC15(GC, 0, mmCP_CE_IC_OP_CNTL);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_10_1_0_offset.h	`[all...]`

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