NetBSD Cross-Reference & Source Code Search Engine

Home	Sort by: relevance \| last modified time \| path

Full Search

in project(s):

Definition

Symbol

File Path

History

| | Help

Searched refs:mmCP_CPC_IC_BASE_CNTL (Results 1 - 9 of 9) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/powerplay/smumgr/
amdgpu_smu8_smumgr.c	`205 mmCP_CPC_IC_BASE_CNTL); 211 cgs_write_register(hwmgr->device, mmCP_CPC_IC_BASE_CNTL, tmp);`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c	`2936 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL); 2940 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL, tmp);`
amdgpu_gfx_v9_0.c	`3283 WREG32_SOC15(GC, 0, mmCP_CPC_IC_BASE_CNTL, tmp);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h	`350 #define mmCP_CPC_IC_BASE_CNTL 0x30bb`
gfx_8_1_d.h	`350 #define mmCP_CPC_IC_BASE_CNTL 0x30bb`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2604 #define mmCP_CPC_IC_BASE_CNTL 0x10bb`
gc_9_1_offset.h	`2874 #define mmCP_CPC_IC_BASE_CNTL 0x10bb`
gc_9_2_1_offset.h	`2808 #define mmCP_CPC_IC_BASE_CNTL 0x10bb`
gc_10_1_0_offset.h	`[all...]`

Completed in 155 milliseconds