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Searched refs:mmCP_CPC_IC_OP_CNTL (Results 1 - 7 of 7) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c	`2321 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); 2323 WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); 2327 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); 2915 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL); 2917 WREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL, tmp); 2921 tmp = RREG32_SOC15(GC, 0, mmCP_CPC_IC_OP_CNTL);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h	`351 #define mmCP_CPC_IC_OP_CNTL 0x30bc`
gfx_8_1_d.h	`351 #define mmCP_CPC_IC_OP_CNTL 0x30bc`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2606 #define mmCP_CPC_IC_OP_CNTL 0x10bc`
gc_9_1_offset.h	`2876 #define mmCP_CPC_IC_OP_CNTL 0x10bc`
gc_9_2_1_offset.h	`2810 #define mmCP_CPC_IC_OP_CNTL 0x10bc`
gc_10_1_0_offset.h	`[all...]`

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