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    Searched refs:mmCP_HQD_CTX_SAVE_CONTROL (Results 1 - 7 of 7) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h 680 #define mmCP_HQD_CTX_SAVE_CONTROL 0x3272
gfx_8_1_d.h 680 #define mmCP_HQD_CTX_SAVE_CONTROL 0x3272
  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v8_0.c 4548 tmp = RREG32(mmCP_HQD_CTX_SAVE_CONTROL);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2910 #define mmCP_HQD_CTX_SAVE_CONTROL 0x1272
gc_9_1_offset.h 3138 #define mmCP_HQD_CTX_SAVE_CONTROL 0x1272
gc_9_2_1_offset.h 3094 #define mmCP_HQD_CTX_SAVE_CONTROL 0x1272
gc_10_1_0_offset.h 5376 #define mmCP_HQD_CTX_SAVE_CONTROL 0x1fd6
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