HomeSort by: relevance | last modified time | path
    Searched refs:mmCP_HQD_DEQUEUE_REQUEST (Results 1 - 16 of 16) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_gfx_v10.c 645 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST);
661 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_DEQUEUE_REQUEST), type);
amdgpu_amdkfd_gfx_v7.c 515 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST);
530 WREG32(mmCP_HQD_DEQUEUE_REQUEST, type);
amdgpu_amdkfd_gfx_v8.c 513 temp = RREG32(mmCP_HQD_DEQUEUE_REQUEST);
528 WREG32(mmCP_HQD_DEQUEUE_REQUEST, type);
amdgpu_amdkfd_gfx_v9.c 591 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_DEQUEUE_REQUEST), type);
amdgpu_gfx_v9_0.c 3488 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);
3494 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,
3577 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);
3592 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,
amdgpu_gfx_v10_0.c 3381 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST, 1);
3387 WREG32_SOC15(GC, 0, mmCP_HQD_DEQUEUE_REQUEST,
amdgpu_gfx_v7_0.c 2918 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 1);
2928 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 0);
amdgpu_gfx_v8_0.c 4425 WREG32(mmCP_HQD_DEQUEUE_REQUEST, 0);
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_7_0_d.h 593 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d
gfx_7_2_d.h 606 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d
gfx_8_0_d.h 656 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d
gfx_8_1_d.h 656 #define mmCP_HQD_DEQUEUE_REQUEST 0x325d
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2862 #define mmCP_HQD_DEQUEUE_REQUEST 0x125d
gc_9_1_offset.h 3090 #define mmCP_HQD_DEQUEUE_REQUEST 0x125d
gc_9_2_1_offset.h 3046 #define mmCP_HQD_DEQUEUE_REQUEST 0x125d
gc_10_1_0_offset.h 5328 #define mmCP_HQD_DEQUEUE_REQUEST 0x1fc1
    [all...]

Completed in 136 milliseconds