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Searched refs:mmCP_HQD_EOP_BASE_ADDR_HI (Results 1 - 8 of 8) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h	`673 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b`
gfx_8_1_d.h	`673 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x326b`
/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_gfx_v10_0.c	`3368 WREG32_SOC15(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI,`
amdgpu_gfx_v9_0.c	`3475 WREG32_SOC15_RLC(GC, 0, mmCP_HQD_EOP_BASE_ADDR_HI,`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2896 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x126b`
gc_9_1_offset.h	`3124 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x126b`
gc_9_2_1_offset.h	`3080 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x126b`
gc_10_1_0_offset.h	`5362 #define mmCP_HQD_EOP_BASE_ADDR_HI 0x1fcf [all...]`

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