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Searched refs:mmCP_HQD_EOP_RPTR (Results 1 - 10 of 10) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/amdgpu/
amdgpu_amdkfd_gfx_v10.c	`332 WREG32(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_EOP_RPTR),`
amdgpu_amdkfd_gfx_v8.c	`242 WREG32(mmCP_HQD_EOP_RPTR, m->cp_hqd_eop_rptr);`
amdgpu_amdkfd_gfx_v9.c	`320 WREG32_RLC(SOC15_REG_OFFSET(GC, 0, mmCP_HQD_EOP_RPTR),`
amdgpu_gfx_v8_0.c	`4553 mqd->cp_hqd_eop_rptr = RREG32(mmCP_HQD_EOP_RPTR); 4600 WREG32(mmCP_HQD_EOP_RPTR, mqd->cp_hqd_eop_rptr);`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h	`675 #define mmCP_HQD_EOP_RPTR 0x326d`
gfx_8_1_d.h	`675 #define mmCP_HQD_EOP_RPTR 0x326d`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2900 #define mmCP_HQD_EOP_RPTR 0x126d`
gc_9_1_offset.h	`3128 #define mmCP_HQD_EOP_RPTR 0x126d`
gc_9_2_1_offset.h	`3084 #define mmCP_HQD_EOP_RPTR 0x126d`
gc_10_1_0_offset.h	`5366 #define mmCP_HQD_EOP_RPTR 0x1fd1 [all...]`

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