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Searched refs:mmCP_HQD_HQ_CONTROL0 (Results 1 - 6 of 6) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h	`668 #define mmCP_HQD_HQ_CONTROL0 0x3266`
gfx_8_1_d.h	`668 #define mmCP_HQD_HQ_CONTROL0 0x3266`
/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h	`2884 #define mmCP_HQD_HQ_CONTROL0 0x1266`
gc_9_1_offset.h	`3112 #define mmCP_HQD_HQ_CONTROL0 0x1266`
gc_9_2_1_offset.h	`3068 #define mmCP_HQD_HQ_CONTROL0 0x1266`
gc_10_1_0_offset.h	`5350 #define mmCP_HQD_HQ_CONTROL0 0x1fca [all...]`

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