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    Searched refs:mmCP_HQD_HQ_CONTROL1 (Results 1 - 6 of 6) sorted by relevancy

  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gca/
gfx_8_0_d.h 671 #define mmCP_HQD_HQ_CONTROL1 0x3269
gfx_8_1_d.h 671 #define mmCP_HQD_HQ_CONTROL1 0x3269
  /src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_offset.h 2892 #define mmCP_HQD_HQ_CONTROL1 0x1269
gc_9_1_offset.h 3120 #define mmCP_HQD_HQ_CONTROL1 0x1269
gc_9_2_1_offset.h 3076 #define mmCP_HQD_HQ_CONTROL1 0x1269
gc_10_1_0_offset.h 5358 #define mmCP_HQD_HQ_CONTROL1 0x1fcd
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