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    Searched refs:mmCP_HQD_IQ_TIMER_DEFAULT (Results 1 - 2 of 2) sorted by relevancy

/src/sys/external/bsd/drm2/dist/drm/amd/include/asic_reg/gc/
gc_9_0_default.h	1432 #define mmCP_HQD_IQ_TIMER_DEFAULT 0x00000000
gc_10_1_0_default.h	2688 #define mmCP_HQD_IQ_TIMER_DEFAULT 0x00000000

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